Semiconductor devices having conductive vias and methods of forming the same

Abstract

Semiconductor devices having a conductive via and methods of forming the same are described herein. As an example, a semiconductor devices may include a conductive via formed in a substrate material, a barrier material, a first dielectric material on the barrier material, a coupling material formed on the substrate material and on at least a portion of the dielectric material, a second dielectric material formed on the coupling material, and an interconnect formed on the conductive via.

What is claimed is: 
     
         1 . A method of forming a semiconductor device, the method comprising:
 forming a conductive via in a substrate material;   performing a reveal process to expose a portion of the conductive via; the exposed portion of the conductive via comprising:
 a barrier material on a conductive core material; and 
 a first dielectric material on the barrier material; 
   exposing a portion of the conductive core material by removing a portion of the first dielectric material and a portion of the barrier material;   forming a coating material on the exposed portion of the conductive core material;   forming a coupling material on at least a portion of the substrate material;   forming a second dielectric material on the coupling material;   performing a curing process that cures the second dielectric material and results in removal of the coating material from the exposed portion of the conductive core material; and   forming an interconnect on the exposed portion of the conductive core material and on at least a portion of the second dielectric material.   
     
     
         2 . The method of  claim 1 , wherein the second dielectric material comprises a spin on dielectric material. 
     
     
         3 . The method of  claim 1 , including performing the curing process at a temperature of 100° C. to 350° C. 
     
     
         4 . The method of  claim 1 , wherein the coating material is an organic solder protectant. 
     
     
         5 . The method of  claim 1 , wherein the method includes forming the semiconductor device without performing an etch process subsequent to exposing the portion of the conductive core material by removing the portion of the first dielectric material and the portion of the barrier material. 
     
     
         6 . The method of  claim 1 , wherein the method includes forming the semiconductor device without performing a chemical vapor deposition process subsequent to exposing the portion of the conductive core material by removing the portion of the first dielectric material and the portion of the barrier material. 
     
     
         7 . The method of  claim 1 , wherein the coupling material is a silane coupling material. 
     
     
         8 . The method of  claim 1 , wherein the coating material is selective to the conductive core material. 
     
     
         9 . A semiconductor device, comprising:
 a conductive via formed in a substrate material, wherein a portion of the conductive via extends from a surface of the substrate material, and wherein the portion of the conductive via extending from the surface of the substrate material comprises:
 a barrier material on a conductive core material; and 
 a first dielectric material on the barrier material; 
   a coupling material formed on the substrate material and on at least a portion of the first dielectric material;   a second dielectric material formed on the coupling material; and   an interconnect formed on an exposed portion of the conductive core and on a portion of the second dielectric material.   
     
     
         10 . The semiconductor device of  claim 9 , wherein the coupling material is not formed on the conductive core material. 
     
     
         11 . The semiconductor device of  claim 10 , wherein the second dielectric material is a spin on dielectric material and the second dielectric material is not formed on the conductive core material. 
     
     
         12 . The semiconductor device of  claim 9 , wherein the exposed portion of the conductive core comprises a portion of the conductive core material having the barrier material removed therefrom. 
     
     
         13 . The semiconductor device of  claim 9 , wherein the coupling material is a silane coupling material. 
     
     
         14 . The semiconductor device of  claim 13 , wherein the silane coupling material is formed from a compound represented by a formula: (XO) 3 Si(CH 2 ) n Y, wherein XO is a hydrolyzable alkoxy group, n is an integer from 1 to 10, and Y is an organo functional group. 
     
     
         15 . A method of forming a semiconductor device, the method comprising:
 forming a conductive via in a substrate material;   performing a reveal process to expose a portion of a conductive via, the exposed portion of the conductive via comprising:
 a barrier material on a conductive core material; and 
 a first dielectric material on the barrier material; 
   removing a portion of the first dielectric material from the exposed portion of the conductive via such that a portion of the barrier material is exposed;   forming a barrier material oxide on the exposed portion of the barrier material by forming a silane coupling material on the exposed portion of the barrier material, wherein the silane coupling material is also formed on at least a portion of the substrate material;   removing the barrier material oxide and the silane coupling material formed on the exposed portion of the barrier material;   forming a second dielectric material dielectric material on the silane coupling material formed on a least a portion of the substrate material; and   forming an interconnect on the exposed portion of the barrier material and on at least a portion of the second dielectric material.   
     
     
         16 . The method of  claim 15 , including performing a bake process subsequent to forming the silane coupling material on the exposed portion of the barrier material. 
     
     
         17 . The method of  claim 15 , wherein the barrier material is a metal and the barrier material oxide is a metal oxide. 
     
     
         18 . The method of  claim 15 , wherein the second dielectric material is a spin on dielectric material. 
     
     
         19 . The method of  claim 15 , including curing the spin on dielectric material prior to forming the interconnect. 
     
     
         20 . The method of  claim 15 , including removing the silane coupling material and the barrier material oxide via a hydrofluoric acid. 
     
     
         21 . A semiconductor device, comprising:
 a conductive via formed in a substrate material, wherein a portion of the conductive via extends from a surface of the substrate material, and wherein the portion of the conductive via extending from the surface of the substrate material comprises:
 a barrier material on a conductive core material; and 
 a first dielectric material on the barrier material; 
   a coupling material formed on the substrate material and on at least a portion of the first dielectric material;   a second dielectric material formed on the coupling material; and   an interconnect formed on a portion of the barrier material and on a portion of the second dielectric material.   
     
     
         22 . The semiconductor device of  claim 21 , wherein the second dielectric material is a spin on dielectric material and the conductive via is a through-silicon-via. 
     
     
         23 . The semiconductor device of  claim 21 , wherein the interconnect contacts both the barrier material and the second dielectric material. 
     
     
         24 . The semiconductor device of  claim 21 , wherein the conductive core material comprises copper.