Semiconductor Package with Embedded Die

Abstract

A semiconductor package having an embedded die and solid vertical interconnections, such as stud bump interconnections, for increased integration in the direction of the z-axis (i.e., in a direction normal to the circuit side of the die). The semiconductor package can include a die mounted in a face-up configuration (similar to a wire bond package) or in a face-down or flip chip configuration.

What is claimed: 
     
         1 . A method of making a semiconductor device, comprising:
 providing a semiconductor die;   forming a conductive layer in a peripheral region around the semiconductor die; and   forming a first bond wire over the conductive layer, wherein the first bond wire extends above the semiconductor die.   
     
     
         2 . The method of  claim 1 , further including depositing an encapsulant around the semiconductor die and first bond wire. 
     
     
         3 . The method of  claim 1 , further including forming an interconnect structure electrically connected to the first bond wire. 
     
     
         4 . The method of  claim 1 , further including a base portion of the first bond wire formed over the conductive layer. 
     
     
         5 . The method of  claim 1 , further including forming a second bond wire extending vertically above the semiconductor die. 
     
     
         6 . The method of  claim 1 , wherein forming the first bond wire includes trimming the first bond wire to a selected height above the semiconductor die. 
     
     
         7 . A method of making a semiconductor device, comprising:
 providing a semiconductor die; and   forming a first wire in a peripheral region around the semiconductor die, wherein the first wire extends above the semiconductor die.   
     
     
         8 . The method of  claim 7 , further including depositing an encapsulant around the semiconductor die and first wire. 
     
     
         9 . The method of  claim 7 , further including forming a conductive layer in the peripheral region around the semiconductor die, wherein the first wire is formed over the conductive layer. 
     
     
         10 . The method of  claim 9 , further including a base portion of the first wire formed over the conductive layer. 
     
     
         11 . The method of  claim 7 , further including forming an interconnect structure electrically connected to the first bond wire. 
     
     
         12 . The method of  claim 7 , further including forming a second wire extending vertically above the semiconductor die. 
     
     
         13 . The method of  claim 7 , wherein forming the first wire includes:
 providing a bond wire; and   trimming the bond wire to a selected height above the semiconductor die.   
     
     
         14 . A semiconductor device, comprising:
 a semiconductor die;   a conductive layer formed in a peripheral region around the semiconductor die; and   a first bond wire over the conductive layer, wherein the first bond wire extends above the semiconductor die.   
     
     
         15 . The semiconductor device of  claim 14 , further including an encapsulant deposited around the semiconductor die and first bond wire. 
     
     
         16 . The semiconductor device of  claim 14 , further including an interconnect structure electrically connected to the first bond wire. 
     
     
         17 . The semiconductor device of  claim 14 , further including a base portion of the first bond wire formed over the conductive layer. 
     
     
         18 . The semiconductor device of  claim 17 , wherein the base portion of the first bond wire covers a side surface of the conductive layer. 
     
     
         19 . The semiconductor device of  claim 14 , further including a second bond wire extending vertically above the semiconductor die. 
     
     
         20 . A semiconductor device, comprising:
 a semiconductor die; and   a first wire formed in a peripheral region around the semiconductor die, wherein the first wire extends above the semiconductor die.   
     
     
         21 . The semiconductor device of  claim 20 , further including an encapsulant deposited around the semiconductor die and first wire. 
     
     
         22 . The semiconductor device of  claim 20 , further including forming a conductive layer in the peripheral region around the semiconductor die, wherein the first wire is formed over the conductive layer. 
     
     
         23 . The semiconductor device of  claim 22 , further including a base portion of the first wire formed over the conductive layer. 
     
     
         24 . The semiconductor device of  claim 20 , further including an interconnect structure electrically connected to the first wire. 
     
     
         25 . The semiconductor device of  claim 20 , further including a second wire extending vertically above the semiconductor die.