Complexity-reduced simulation of circuit reliability

Abstract

A system and method for simulating an electronic circuit is disclosed. The method includes creating a finite set of circuit or device parameter points selected from within an n-dimensional parameter space. The method includes determining, for each circuit or device parameter point of the set, a corresponding response value of the performance metric and a corresponding probability of occurrence. The method includes determining, for a predetermined value of the performance metric, the total probability of occurrence.

What is claimed is: 
     
         1 . A method of simulating an electronic circuit, the method comprising
 creating a finite set of circuit or device parameter points selected from within an n-dimensional parameter space,   determining, for each circuit or device parameter point of the set, a corresponding response value of a performance metric and a corresponding probability of occurrence, and   determining, for a predetermined value of the performance metric, the total probability of occurrence.   
     
     
         2 . The method of  claim 1 , wherein creating the finite set of circuit or device parameter points comprises defining, for each circuit or device parameter, a lower bound and an upper bound of parameter values for which the response values of the performance metric are to be determined, as well as a distribution of parameter values between the lower bound and the upper bound. 
     
     
         3 . The method of  claim 2 , wherein the parameter values for a particular parameter are equidistantly distributed between the lower bound and the upper bound for that parameter. 
     
     
         4 . The method of  claim 1 , wherein determining, for each circuit or device parameter point, a response value and a probability of occurrence, comprises storing these values. 
     
     
         5 . The method of  claim 4 , furthermore comprising grouping the response values based on value so that response values that do not deviate more than a pre-determined error margin are grouped in a same bin. 
     
     
         6 . The method of  claim 5 , furthermore comprising ranking the bins from high to low. 
     
     
         7 . The method of  claim 5 , wherein determining the total probability of occurrence of a predetermined value of the performance metric comprises selecting one of the bins, and for the selected bin, summing all probabilities of occurrence. 
     
     
         8 . The method of  claim 7 , wherein summing is implemented as an integration operation. 
     
     
         9 . The method of  claim 4 , furthermore comprising comparing response values. 
     
     
         10 . The method of  claim 9 , wherein determining the total probability of occurrence of a predetermined value of the performance metric comprises:
 comparing each response value with the predetermined response value; and   summing, for all response values lower than the predetermined response value, the probabilities of occurrence.   
     
     
         11 . The method of  claim 10 , wherein summing is implemented as an integration operation. 
     
     
         12 . The method of  claim 1 , wherein the probabilities of occurrence of the circuit or device parameter points are time-dependent, wherein the method further comprises repeating the steps of determining the probability of occurrence of the circuit or device parameter points; and determining, for a predetermined value of the performance metric, the total probability of occurrence. 
     
     
         13 . The method of  claim 12 , wherein the probabilities of occurrence of the circuit or device parameter points are a function of at least one signal of the electronic circuit. 
     
     
         14 . A non-transitory computer-readable medium storing instructions that when executed cause a processor to perform a method of simulating an electronic circuit, the method comprising:
 creating a finite set of circuit or device parameter points selected from within an n-dimensional parameter space,   for each circuit or device parameter point of the set, determining a corresponding response value of a performance metric and a corresponding probability of occurrence, and   determining, for a predetermined value of the performance metric, the total probability of occurrence.   
     
     
         15 . A system having a processor that implements via software the method of  claim 1 .