Method and apparatus for making integrated circuit packages

Abstract

A method of making a plurality of integrated circuit (“IC”) packages includes picking up a plurality of physically unconnected IC components; and simultaneously placing each of the physically unconnected IC components on corresponding portions of an unsingulated IC package strip that includes a sheet of integrally connected leadframes.

What is claimed is: 
     
         1 . A pick and place machine for gang mounting integrated circuit (“IC”) package components on an array of partially assembled IC packages comprising a tool head plate with a plurality of holes extending therethrough that are arranged in an array of the same size and shape as said array of partially assembled IC packages. 
     
     
         2 . The pick and place machine of  claim 1  wherein said tool head plate is mounted on a tool head that is operably displaceable between a first operating position wherein said plurality of holes are aligned with corresponding ones of an array of singulated IC package components and a second operating position wherein said plurality of holes are aligned with corresponding ones of said array of partially assembled IC packages. 
     
     
         3 . The pick and place machine of  claim 1  wherein said holes are of a size and shape adapted to pick and place QFN clips of a preselected size and shape, 
     
     
         4 . The pick and place machine of  claim 1  wherein said holes are of a size and shape adapted to pick and place IC dies of a preselected size and shape. 
     
     
         5 . A method of making integrated circuit (“IC”) packages comprising:
 providing a pick and place machine having a tool head with a plate that has a plurality of holes extending therethrough that are arranged in an array identical in size and shape to an array of partially assembled IC packages; 
 positioning said tool head at a first position wherein said plurality of holes are aligned with corresponding ones of an array of singulated IC package components; 
 applying a vacuum to said plurality of holes; 
 positioning said tool head at a second position wherein said plurality of holes are aligned with corresponding ones of said array of partially assembled IC packages; and 
 removing said vacuum from said plurality of holes. 
 
     
     
         6 . The method of  claim 5  further comprising singulating IC components attached to an IC component panel to provide said array of singulated IC package components. 
     
     
         7 . The method of  claim 6  further comprising applying solder paste to at least one of said array of singulated IC package components and said array of partially assembled IC packages. 
     
     
         8 . The method of  claim 7  further comprising reflowing said solder paste to bond corresponding ones of said array of singulated IC package components and said array of partially assembled IC packages. 
     
     
         9 . The method of  claim 5  wherein said positioning the tool head at a first position wherein said plurality of holes are aligned with corresponding ones of an array of singulated IC package components comprises positioning said tool head at a first position wherein said plurality of holes are aligned with corresponding ones of an array of singulated clips. 
     
     
         10 . The method of  claim 5  wherein said positioning the tool head at a first position wherein said plurality of holes are aligned with corresponding ones of an array of singulated IC package components comprises positioning said tool head at a first position wherein said plurality of holes are aligned with corresponding ones of an array of singulated IC dies. 
     
     
         11 . An intermediate product assembly made in the production of Quad Flat No-lead Packages (“QFNs”) comprising:
 a pick and place machine tool head comprising an array of vacuum holes; and 
 a plurality of singulated QFN components that are vacuum attached to said tool head in covering relationship with said plurality of vacuum holes. 
 
     
     
         12 . The intermediate product assembly of  claim 11  wherein said singulated QFN components are singulated clips. 
     
     
         13 . The intermediate product assembly of  claim 11  wherein said singulated QFN components are singulated Integrated Circuit (“IC”) dies. 
     
     
         14 . The intermediate product assembly of  claim 11  wherein said tool head and said plurality of singulated QFN components attached thereto are positioned above an unsingulated leadframe sheet having at least one plurality of other QFN components mounted on corresponding leadframe portions of said leadframe sheet. 
     
     
         15 . The intermediate product assembly of  claim 14  wherein at least one of said plurality of singulated QFN components or said at least one plurality of other QFN components have a coating of solder paste thereon. 
     
     
         16 . The intermediate product assembly of  claim 15  wherein said other plurality of QFN components comprise a plurality of first IC dies mounted on said corresponding leadframe portions. 
     
     
         17 . The intermediate product assembly of  claim 16  wherein said other plurality of QFN components further comprise a plurality of lower clips attached to corresponding ones of said first plurality of IC dies. 
     
     
         18 . The intermediate product assembly of  claim 17  wherein said other plurality of QFN components further comprise a plurality of upper dies attached to corresponding ones of said plurality of lower clips. 
     
     
         19 . The intermediate product assembly of  claim 18  wherein said plurality of singulated QFN components that are vacuum attached to said tool head in covering relationship with said plurality of vacuum holes comprise a plurality of upper clips. 
     
     
         20 . The intermediate product assembly of  claim 19  wherein said plurality of upper dies and said plurality of upper clips have a layer of solder paste sandwiched therebetween, 
     
     
         21 . A method of making integrated circuit (“IC”) packages comprising:
 picking up a plurality of physically unconnected IC components; and 
 simultaneously placing each of the physically unconnected IC components on corresponding portions of an unsingulated IC package strip that includes a sheet of integrally connected leadframes.