Field plate configuration of a semiconductor device

Abstract

A semiconductor device includes a semiconductor substrate having a principal surface, and an insulating film formed on the principal surface and continuously covering a top surface of a first boundary region and a top surface of a second boundary region, the first boundary region including a boundary between a well layer and a RESURF layer, the second boundary region including a boundary between the RESURF layer and a first impurity region. The semiconductor device further includes a plurality of lower field plates formed in the insulating film in such a manner that the plurality of lower field plates do not lie directly above the first and second boundary regions, and a plurality of upper field plates formed on the insulating film in such a manner that the plurality of upper field plates do not lie directly above the first and second boundary regions.

What is claimed is: 
     
         1 . A semiconductor device comprising:
 a semiconductor substrate having a principal surface;   a first impurity region of a first conductivity type formed in said semiconductor substrate;   a well layer of a second conductivity type formed in said semiconductor substrate along said principal surface;   a channel stopper of said first conductivity type formed in said semiconductor substrate away from said well layer and along said principal surface; and   a RESURF layer formed in said semiconductor substrate between said well layer and said channel stopper and along said principal surface, and having an impurity concentration of said second conductivity type which gradually decreases away from said well layer toward said channel stopper.   
     
     
         2 . The semiconductor device according to  claim 1 , wherein said RESURF layer is formed of a plurality of regions of said second conductivity type which are closely spaced on the well layer side of said semiconductor substrate and widely spaced on the channel stopper side of said semiconductor substrate. 
     
     
         3 . The semiconductor device according to  claim 1 , wherein said RESURF layer is formed of a plurality of regions of said second conductivity type which gradually decrease in area and in depth from said principal surface as said plurality of regions are located further away from said well layer toward said channel stopper. 
     
     
         4 . A semiconductor device comprising:
 a semiconductor substrate having a principal surface;   a first impurity region of a first conductivity type formed in said semiconductor substrate;   a RESURF layer of a second conductivity type formed in said semiconductor substrate and along said principal surface;   a well layer of said second conductivity type formed in said semiconductor substrate adjacent said RESURF layer and along said principal surface;   a concentration gradient reducing section formed in the portion of said well layer adjacent said RESURF layer in such a manner that the impurity concentration gradient of said second conductivity type between said well layer and said RESURF layer is reduced; and   a gate wire formed directly above said concentration gradient reducing section.   
     
     
         5 . The semiconductor device according to  claim 4 , further comprising an emitter grounding electrode formed directly above said concentration gradient reducing section and connected to an emitter electrode.