US2016248695A1PendingUtilityA1

Detection and control of resource congestion by a number of processors

Assignee: SILICON GRAPHICS INT CORPPriority: Jul 31, 2003Filed: Feb 23, 2016Published: Aug 25, 2016
Est. expiryJul 31, 2023(expired)· nominal 20-yr term from priority
H04W 72/20H04L 43/16G06F 9/3824H04L 47/745
48
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Claims

Abstract

In an embodiment, a system includes a resource. The system also includes a first processor having a load/store functional unit. The load/store functional unit is to attempt to access the resource based on access requests. The first processor includes a congestion detection logic to detect congestion of access of the resource based on a consecutive number of negative acknowledgements received in response to the access requests prior to receipt of a positive acknowledgment in response to one of the access requests within a first time period.

Claims

exact text as granted — not AI-modified
1 . (canceled) 
     
     
         2 . A method for controlling congestion when communicating with a resource, the method comprising:
 sending a first request to access the resource, wherein the resource is includes a memory of one or more memories coupled to one or more processors, and the first request is sent from a processor of the one or more processors;   receiving a negative acknowledgement from the resource, the negative acknowledgement indicating that the resource is not accessible;   placing a logic value of a one in an averaging shift window based on receiving the negative acknowledgement, wherein the averaging shift window includes a plurality of bits, and the logic value of one in the averaging shift window is stored in a first bit of the plurality of bits in the averaging shift window;   sending a second request to access the resource;   receiving an acknowledgement indicating that the resource is accessible;   placing a logic value of a zero in first bit of the averaging shift window based on receiving the acknowledgement, wherein the logic value of the one is moved to a second bit of the plurality of bits in the averaging shift window;   receiving an input, wherein the input identifies a bit of the plurality of bits in the averaging shift window, wherein the logic value associated with the identified bit of the plurality of bits identifies whether a value in a negative acknowledgement count should be changed; and   identifying that the negative acknowledgement count has reached a threshold, wherein subsequent requests to access the resource are prevented from being sent for a first period of time after the negative acknowledgement counter has reached the threshold.   
     
     
         3 . The method of  claim 2 , wherein the one or more processors are coupled to the resource by a hub controller. 
     
     
         4 . The method of  claim 2 , wherein the averaging shift window is a hardware shift register. 
     
     
         5 . The method of  claim 2 , wherein the value of the negative acknowledgement count is incremented when the value of the identified bit is a one. 
     
     
         6 . The method of  claim 2 , wherein the value of the negative acknowledgement count is decremented with the value of the identified bit is a one. 
     
     
         7 . The method of  claim 3 , wherein the hardware shift register has a plurality of output, each of the outputs is connected to a hardware multiplexer, and the input is an input of the hardware multiplexer that selects which output of the hardware shift register is output on an output of the hardware multiplexer. 
     
     
         8 . The method of  claim 1 , wherein the identifying that the negative acknowledgement counter has reached a threshold is performed by hardware comparison logic. 
     
     
         9 . The method of  claim 1 , wherein the identifying that the negative acknowledgement count has reached a threshold causes logic values stored in the averaging shift window to be reset to an initial value, and the initial value corresponding to a binary value identified by the plurality of bits in the averaging shift window. 
     
     
         10 . A non-transitory computer readable storage medium having embodied thereon a program executable by a processor for controlling congestion when communicating with a resource, the method comprising:
 sending a first request to access the resource, wherein the resource is includes a memory of one or more memories coupled to one or more processors, and the first request is sent from a processor of the one or more processors;   receiving a negative acknowledgement from the resource, the negative acknowledgement indicating that the resource is not accessible;   placing a logic value of a one in an averaging shift window based on receiving the negative acknowledgement, wherein the averaging shift window includes a plurality of bits, and the logic value of one in the averaging shift window is stored in a first bit of the plurality of bits in the averaging shift window;   sending a second request to access the resource;   receiving an acknowledgement indicating that the resource is accessible; and   placing a logic value of a zero in first bit of the averaging shift window based on receiving the acknowledgement, wherein:
 the logic value of the one is moved to a second bit of the plurality of bits in the averaging shift window, 
 a bit of the plurality of bits is identified in the averaging shift window, 
 the logic value associated with the identified bit of the plurality of bits identifies whether a value in a negative acknowledgement count should be changed, and 
 subsequent requests to access the resource are prevented from being sent for a first period of time after the negative acknowledgement counter has reached the threshold. 
   
     
     
         11 . The non-transitory computer readable storage medium of  claim 10 , wherein the one or more processors are coupled to the resource by a hub controller. 
     
     
         12 . The non-transitory computer readable storage medium of  claim 10 , wherein the value of the negative acknowledgement count is incremented when the value of the identified bit is a one. 
     
     
         13 . The non-transitory computer readable storage medium of  claim 10 , wherein the value of the negative acknowledgement count is decremented with the value of the identified bit is a one. 
     
     
         14 . The non-transitory computer readable storage medium of  claim 10 , wherein the identifying that the negative acknowledgement counter has reached a threshold causes logic values stored in the averaging shift window to be reset to an initial value, and the initial value corresponding to a binary value identified by the plurality of bits in the averaging shift window. 
     
     
         15 . A system for controlling congestion when communication with a resource, the system comprising:
 one or more processors, wherein each of the one or more processors executes program code out of one or more memories;   a plurality of cache memories, wherein:
 the resource includes at least one of the plurality of cache memories is the resource, 
 a first request to access the resource is sent to the resource, 
 the resource is coupled to the one or more processors by a hardware connection, 
 the first request is sent from a processor of the one or more processors; 
 a negative acknowledgement is received from the resource, the negative acknowledgement indicating that the resource is not accessible, 
 placing a logic value of a one in an averaging shift window based on receiving the negative acknowledgement, 
 the averaging shift window including plurality of bits, 
 the logic value of one in the averaging shift window is stored in a first bit of the plurality of bits in the averaging shift window, 
 a second request to access the resource is sent to the resource, 
 an acknowledgement indicating that the resource is accessible is received, 
   placing a logic value of a zero in first bit of the averaging shift window based on receiving the acknowledgement, wherein the logic value of the one is moved to a second bit of the plurality of bits in the averaging shift window,   a bit of the plurality of bits in the averaging shift window is identified,   the logic value associated with the identified bit of the plurality of bits identifies whether a value in a negative acknowledgement count should be changed, and   the negative acknowledgement count reaching a threshold prevents subsequent requests to access the resource from being sent to the resource for a first period of time after the negative acknowledgement counter has reached the threshold.   
     
     
         16 . The system of  claim 15 , wherein the one or more processors are coupled to the resource by a hub controller. 
     
     
         17 . The system of  claim 15 , wherein the averaging shift window is a hardware shift register. 
     
     
         18 . The system of  claim 15 , wherein the value of the negative acknowledgement count is incremented when the value of the identified bit is a one. 
     
     
         19 . The system of  claim 15 , wherein the value of the negative acknowledgement count is decremented with the value of the identified bit is a one. 
     
     
         20 . The system of  claim 17 , wherein the hardware shift register has a plurality of outputs, each of the outputs is connected to a hardware multiplexer, and the input is an input of the hardware multiplexer that selects which output of the hardware shift register is output on an output of the hardware multiplexer, 
     
     
         21 . The system of  claim 17 , wherein the identifying that the negative acknowledgement counter has reached a threshold is performed by hardware comparison logic, the identifying that the negative acknowledgement count has reached a threshold causes logic values stored in the averaging shift window to be reset to an initial value, and the initial value corresponding to a binary value identified by the plurality of bits in the averaging shift window.

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