Array substrate, manufacturing method thereof, display panel and display device

Abstract

An array substrate includes a display area and a driving area; thin film transistors in the display area and the driving area are provided with insulation layers between gate electrodes and active layers, and the thickness of the insulation layer of the thin film transistor in the driving area is larger than the thickness of the insulation layer of the thin film transistor in the display area. The present invention has the beneficial effects that when electrostatic discharge occurs between the gate electrode and the source/drain electrodes of the driving area, the breakdown of the insulation layer can be prevented, thereby resulting in no short circuit of the gate electrode and the source/drain electrodes; meanwhile, adverse effects such as a reduced migration rate and threshold voltage drift of the thin film transistor in the display area will not be caused.

1 - 10 . (canceled) 
     
     
         11 . An array substrate, comprising a display area for displaying and a driving area located around the display area, wherein thin film transistors are provided in both the display area and the driving area, and the thin film transistors are provided with insulation layers between gate electrodes and active layers, wherein
 a thickness of the insulation layer of the thin film transistor in the driving area is larger than a thickness of the insulation layer of the thin film transistor in the display area.   
     
     
         12 . The array substrate of  claim 11 , wherein
 the insulation layer of the thin film transistor in the driving area comprises a first insulation layer and a second insulation layer; and   the insulation layer of the thin film transistor in the display area comprises the second insulation layer.   
     
     
         13 . The array substrate of  claim 12 , wherein
 the second insulation layer of the thin film transistor in the driving area is located on the first insulation layer.   
     
     
         14 . The array substrate of  claim 12 , wherein
 a thickness of the second insulation layer is 1000-3000 Å; and   a thickness of the first insulation layer is 2000-6000 Å.   
     
     
         15 . A manufacturing method of an array substrate, comprising a step of forming insulation layers in a driving area and a display area of the array substrate, wherein
 thin film transistors are provided in both the display area and the driving area; the insulation layers are arranged between gate electrodes and active layers of the thin film transistors; and a thickness of the insulation layer of the thin film transistor in the driving area is larger than a thickness of the insulation layer of the thin film transistor in the display area.   
     
     
         16 . The manufacturing method of the array substrate of  claim 15 , wherein the step of forming the insulation layers in the driving area and the display area of the array substrate comprises:
 a step of forming a pattern comprising a first insulation layer of the thin film transistor in the driving area through a patterning process; and   a step of forming a pattern comprising a second insulation layer of the thin film transistors in the driving area and the display area through a patterning process.   
     
     
         17 . The manufacturing method of the array substrate of  claim 16 , wherein
 in the steps of forming the pattern comprising the first insulation layer and forming the pattern comprising the second insulation layer through a patterning process, a same display area mask is adopted, the display area mask comprising a blank part without a pattern and a pattern part with a pattern corresponding to the second insulation layer in the display area; and   in the steps of forming the pattern comprising the first insulation layer and forming the pattern comprising the second insulation layer through a patterning process, a photoresist layer in the display area is exposed for multiple times to form the pattern required.   
     
     
         18 . The manufacturing method of the array substrate of  claim 17 , wherein the blank part and the pattern part of the display area mask each symmetrically occupy a half of the display area respectively. 
     
     
         19 . A display device, comprising a display panel which comprises an array substrate, wherein
 the array substrate comprises a display area for displaying and a driving area located around the display area, wherein thin film transistors are provided in both the display area and the driving area, and the thin film transistors are provided with insulation layers between gate electrodes and active layers, wherein   a thickness of the insulation layer of the thin film transistor in the driving area is larger than a thickness of the insulation layer of the thin film transistor in the display area.   
     
     
         20 . The display device of  claim 19 , wherein
 the insulation layer of the thin film transistor in the driving area comprises a first insulation layer and a second insulation layer; and   the insulation layer of the thin film transistor in the display area comprises the second insulation layer.   
     
     
         21 . The display device of  claim 20 , wherein
 the second insulation layer of the thin film transistor in the driving area is located on the first insulation layer.   
     
     
         22 . The display device of  claim 20 , wherein
 a thickness of the second insulation layer is 1000-3000 Å; and   a thickness of the first insulation layer is 2000-6000 Å.