Semiconductor device
Abstract
The present invention makes it possible to lower the on resistance of a semiconductor element without hindering the function of a diffusion prevention film in a semiconductor device having the semiconductor element that uses a wire in a wiring layer as a gate electrode and has a gate insulation film in an identical layer to the diffusion prevention film. A first wire and a gate electrode are embedded into the surface layer of an insulation layer comprising a first wiring layer. A diffusion prevention film is formed between the first wiring layer and a second wiring layer. A gate insulation film is formed by: forming a recess over the upper face of the diffusion prevention film in the region overlapping with the gate electrode and around the region; and thinning the part.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A semiconductor device, comprising:
a first wiring layer including first wirings embedded into a first interlayer insulating film; a second wiring layer formed over the first wiring layer including second wirings and via electrodes embedded into a second interlayer insulating film; a gate electrode comprised one of the first wirings; a first gate insulating film formed between the first wiring layer and the second wiring layer and located over the gate electrode; a second gate insulating over the first gate insulating film; a diffusion prevention film covering the first wirings except the gate electrode and formed between the first wiring layer and the second wiring layer; and a semiconductor film formed between the first wiring layer and the second wiring layer and located over the second gate insulating film; wherein the second wirings are coupled to the semiconductor film through the via electrodes.
2 . The semiconductor device according to claim 1 ,
wherein the material for the second gate insulating film has a higher permittivity than the material for the first insulating film.
3 . The semiconductor device according to claim 2 ,
wherein the diffusion prevention film comprises SiN, SiCN, or SiC.
4 . The semiconductor device according to claim 2 ,
wherein the second gate insulating film includes an SiN layer, a composite metallic oxide layer having a perovskite structure, or a layer of oxide of one or more kinds of metals selected from the group consisting of Si, Al, Hf, Zr, Ta, and Ti.
5 . The semiconductor device according to claim 1 ,
wherein the first gate insulating film is formed by thinning a part of the diffusion prevention film located over the gate electrode.
6 . The semiconductor device according to claim 1 ,
wherein the gate electrode is Cu.
7 . The semiconductor device according to claim 1 ,
wherein source and drain are formed in the semiconductor film,
wherein the semiconductor film includes an oxide semiconductor film of InGaZnO layer, an InZnO layer, a ZnO layer, a ZnAlO layer, a ZnCuO layer, NiO, SnO, or CuO.Join the waitlist — get patent alerts
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