US2016240564A1PendingUtilityA1
Semiconductor device and semiconductor device manufacturing method
Est. expirySep 14, 2032(~6.2 yrs left)· nominal 20-yr term from priority
H10P 95/90H10D 99/00H10D 86/441H10D 86/021H10D 84/856H10D 84/07H10D 64/512H10D 62/871H10D 62/80H10D 30/6755H10D 30/87H10D 86/423H10D 86/60H01L 29/242H01L 29/66969H01L 27/1259H01L 29/24H01L 29/7869H01L 21/477H01L 29/42356H01L 27/124H01L 27/1225H01L 27/0922
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Claims
Abstract
A semiconductor device has a p-type metal oxide semiconductor layer; a source electrode connected with the p-type metal oxide semiconductor layer; a drain electrode connected with the p-type metal oxide semiconductor layer; and a gate electrode arranged to oppose to a part of the p-type metal oxide semiconductor layer. The gate electrode and the drain electrode are separated from each other in a top view.
Claims
exact text as granted — not AI-modified1 - 16 . (canceled)
17 . A semiconductor device comprising:
a first transistor; and a second transistor, wherein the first transistor comprises:
a first p-type metal oxide semiconductor region;
a first source electrode connected with the first p-type metal oxide semiconductor region;
a first drain electrode connected with the first p-type metal oxide semiconductor region;
a first gate electrode arranged to oppose a part of the first p-type metal oxide semiconductor region,
wherein the first gate electrode is arranged between the first source electrode and the first drain electrode in a top view, and the first gate electrode and the first drain electrode are separated from each other in the top view, wherein the second transistor comprises:
a second p-type metal oxide semiconductor region;
a second source electrode connected with the second p-type metal oxide semiconductor region;
a second drain electrode connected with the second p-type metal oxide semiconductor region; and
a second gate electrode arranged to oppose a part of the second p-type metal oxide semiconductor region,
wherein the second gate electrode is arranged between the second source electrode and the second drain electrode in the top view, and the second gate electrode and the second drain electrode overlap partially in the top view, wherein the first p-type metal oxide semiconductor region and the second p-type metal oxide semiconductor region are provided in a same layer, wherein the first p-type metal oxide semiconductor region and the second p-type metal oxide semiconductor region are covered with an insulating film, wherein the first source electrode, the first drain electrode, the second source electrode and the second drain electrode are embedded in the insulating film, and wherein the first gate electrode and the second gate electrode are provided in a same layer.
18 . The semiconductor device according to claim 17 , wherein the first gate electrode and the second gate electrode are connected with an input terminal, and the first drain electrode and the second drain electrode are connected with an output terminal.
19 . The semiconductor device according to claim 18 , further comprising:
a coupling p-type metal oxide semiconductor region extending along a second direction to connect the first p-type metal oxide semiconductor region and the second p-type metal oxide semiconductor region, wherein the first gate electrode and the second gate electrode extend along the second direction and comprise a continuous member, the first p-type metal oxide semiconductor region extends along a first direction orthogonal to the second direction to intersect with the first gate electrode in the top view, and the second p-type metal oxide semiconductor region extends along the first direction to intersect with the second gate electrode in the top view, and wherein the coupling p-type metal oxide semiconductor region is connected with the output terminal through an auxiliary electrode different from the first drain electrode and the second drain electrode.
20 . (canceled)Join the waitlist — get patent alerts
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