Semiconductor device having buried gate, method of fabricating the same, and module and system having the same

Abstract

A semiconductor device includes junction regions formed in upper portions of both sidewalls of a trench formed in a semiconductor substrate, a first gate electrode buried in the trench and having a stepped upper surface, and a second gate electrode formed on the first gate electrode to overlap a junction region.

1 - 21 . (canceled) 
     
     
         22 . A semiconductor device, comprising:
 a cell array including a plurality of cells, the cells being coupled to word lines and bit lines;   a sense amplifier coupled to the bit lines and configured to sense data stored in the cells;   a row decoder coupled to buried gates of cells and configured to generate a signal for activating the cells; and   a column decoder configured to generate a driving signal for operating the sense amplifier coupled to a cell selected by the row decoder,   wherein each of the cells includes:
 first and second junction regions formed in upper portions of first and second sidewalls of a trench in a semiconductor substrate, 
 a first gate electrode buried in the trench and having a stepped upper surface, and 
 a second gate electrode disposed over the first gate electrode and including a lower portion that overlaps the first junction region. 
   
     
     
         23 . A semiconductor module including a plurality of semiconductor devices mounted on a board, wherein each of the semiconductor devices includes:
 first and second junction regions in upper portions of both sidewalls of a trench formed in a semiconductor substrate;   a first gate electrode buried in the trench and having a stepped upper surface; and   a second gate electrode formed on the first gate electrode and including a lower portion that overlaps the first junction region.   
     
     
         24 . A semiconductor system, comprising:
 a semiconductor module including a plurality of semiconductor devices mounted on a board; and   a controller configured to control an operation of the semiconductor module,   wherein each of the semiconductor devices includes:
 first and second junction regions formed in upper portions of both sidewalls of a trench formed in a semiconductor substrate, 
 a first gate electrode buried in the trench and having a stepped upper surface, and 
 a second gate electrode formed on the first gate electrode and including a lower portion that overlaps the first junction region. 
   
     
     
         25 . A computer system, comprising:
 a semiconductor system having at least one semiconductor module; and   a processor configured to process data stored in the semiconductor system,   wherein the semiconductor module includes a plurality of semiconductor devices mounted on a board, and   wherein each of the plurality of semiconductor devices includes:
 first and second junction regions formed in upper portions of both sidewalls of a trench formed in a semiconductor substrate, 
 a first gate electrode buried in the trench and having a stepped upper surface, and 
 a second gate electrode formed on the first gate electrode and including a lower portion that overlaps the first junction region. 
   
     
     
         26 . A data processing system, comprising at least one semiconductor device mounted on a board, wherein the semiconductor device includes:
 first and second junction regions formed in upper portions of both sidewalls of a trench formed in a semiconductor substrate;   a first gate electrode buried in the trench and having a stepped upper surface; and   a second gate electrode formed on the first gate electrode and including a lower portion that overlaps the first junction region.   
     
     
         27 . An electronic system, comprising at least one data processing system, wherein the data processing system includes at least one semiconductor device mounted on a board, and wherein the semiconductor device includes:
 junction regions formed on upper portions of both sidewalls of a trench formed in a semiconductor substrate;   a first gate electrode buried in the trench and having a stepped upper surface; and   a second gate electrode formed on the first gate electrode and including a lower portion that to overlaps the first junction region.