Rf package and manufacturing method thereof

Abstract

Disclosed is a method of improving performance and increasing a freedom degree of design of an interconnect structure in a radio frequency (RF) package. The RF package may include a package base, a semiconductor die mounted on the package base, a package substrate formed on the package base, the package substrate comprising at least one defected substrate structure (DSS), and a conducting pattern formed on one side of the package substrate and electrically connected with the semiconductor die, wherein the at least one DSS overlaps at least a portion of the conducting pattern in perspective of a top view of the RF package.

What is claimed is: 
     
         1 . A radio frequency (RF) package, comprising:
 a package base;   a semiconductor die mounted on the package base;   a package substrate formed on the package base, the package substrate comprising at least one defected substrate structure (DSS); and   a conducting pattern formed on one side of the package substrate and electrically connected with the semiconductor die.   
     
     
         2 . The RF package of  claim 1 , wherein the at least one DSS overlaps at least a portion of the conducting pattern in perspective of a top view of the RF package. 
     
     
         3 . The RF package of  claim 1 , wherein the at least one DSS is to be separate from the conducting pattern of the package substrate. 
     
     
         4 . The RF package of  claim 1 , wherein at least a portion of the at least one DSS is in contact with the package base. 
     
     
         5 . The RF package of  claim 1 , further comprising:
 an interconnect structure configured to electrically connect the semiconductor die and the conducting pattern.   
     
     
         6 . The RF package of  claim 5 , wherein the interconnect structure is a bonding wire. 
     
     
         7 . The RF package of  claim 1 , further comprising:
 a connection pin formed on the conducting pattern, the connection pin electrically connected with the conducting pattern.   
     
     
         8 . The RF package of  claim 1 , wherein the at least one DSS has a shape of a rectangular parallelepiped. 
     
     
         9 . The RF package of  claim 1 , wherein the at least one DSS has a shape of a regular hexahedron. 
     
     
         10 . The RF package of  claim 1 , wherein the at least one DSS has a shape of at least a portion of a cylinder. 
     
     
         11 . A package substrate used for a radio frequency (RF) package, the package substrate comprising:
 at least one defected substrate structure (DSS), wherein the package substrate is combined with one surface of a package base and one surface of a conducting pattern, and the package substrate surrounds a semiconductor die mounted on the one surface of the package base.   
     
     
         12 . The package substrate of  claim 11 , wherein the at least one DSS overlaps at least a portion of the conducting pattern in perspective of a top view of the RF package. 
     
     
         13 . The package substrate of  claim 11 , wherein the at least one DSS is to be separate from the one surface of the conducting pattern. 
     
     
         14 . The package substrate of  claim 11 , wherein at least a portion of the at least one DSS is in contact with the one surface of the package base. 
     
     
         15 . A radio frequency (RF) package manufacturing method, the method comprising:
 forming a package base;   mounting a semiconductor die on the package base;   forming a package substrate comprising at least one defected substrate structure (DSS) on the package base;   forming a conducting pattern in one surface of the package substrate; and   electrically connecting the semiconductor die and the conducting pattern.   
     
     
         16 . The method of  claim 15 , wherein the at least one DSS is formed to overlap at least a portion of the conducting pattern in perspective of a top view of the RF package. 
     
     
         17 . The method of  claim 15 , wherein the at least one DSS is formed to be separate from the conducting pattern. 
     
     
         18 . The method of  claim 15 , wherein the at least a portion of the at least one DSS is in contact with the package base. 
     
     
         19 . The method of  claim 15 , wherein the electrically connecting of the semiconductor die and the conducting pattern comprises forming an interconnect structure configured to electrically connect the semiconductor die and the conducting pattern. 
     
     
         20 . The method of clam  15 , further comprising:
 forming a connection pin on the conducting pattern, the connection pin electrically connected with the conducting pattern.