US2016218113A1PendingUtilityA1

Integrated Circuits with Non-Volatile Memory and Methods for Manufacture

Assignee: CYPRESS SEMICONDUCTOR CORPPriority: Dec 14, 2012Filed: Apr 1, 2016Published: Jul 28, 2016
Est. expiryDec 14, 2032(~6.4 yrs left)· nominal 20-yr term from priority
H10D 64/037H10D 30/696H10D 30/0413H01L 27/11573H01L 27/11568H01L 29/42344H10B 43/30H10B 43/40
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Claims

Abstract

Semiconductor devices and methods of manufacturing thereof are described. According to an example embodiment, a semiconductor device comprises: a substrate comprising a core region and a peripheral region, where the core region is adjacent to the peripheral region; a memory array comprising non-volatile memory cells that are located in the core region of the substrate; a high-voltage control logic comprising high-voltage transistors that are located in the peripheral region of the substrate; and a low-voltage control logic comprising low-voltage transistors that are located in the peripheral region of the substrate.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A semiconductor device, comprising:
 a substrate comprising a core region and a peripheral region, wherein the core region is adjacent to the peripheral region;   a memory array comprising non-volatile memory cells, wherein the non-volatile memory cells are located in the core region of the substrate;   a high-voltage control logic comprising high-voltage transistors, wherein the high-voltage transistors are located in the peripheral region of the substrate; and   a low-voltage control logic comprising low-voltage transistors, wherein the low-voltage transistors are located in the peripheral region of the substrate.   
     
     
         2 . The semiconductor device of  claim 1 , wherein the non-volatile memory cells comprise split-gate non-volatile memory cells. 
     
     
         3 . The semiconductor device of  claim 1 , wherein the high-voltage control logic is configured to control portions of the memory array. 
     
     
         4 . The semiconductor device of  claim 1 , wherein the low-voltage control logic is configured to control the operation of the semiconductor device. 
     
     
         5 . The semiconductor device of  claim 1 , wherein the low-voltage control logic includes a micro-controller. 
     
     
         6 . The semiconductor device of  claim 1 , wherein the substrate comprises a particular area that includes the core region and the peripheral region.

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