US2016218056A1PendingUtilityA1

Intermetallic compound filled vias

Assignee: IBMPriority: Feb 25, 2014Filed: Apr 3, 2016Published: Jul 28, 2016
Est. expiryFeb 25, 2034(~7.6 yrs left)· nominal 20-yr term from priority
H10W 72/07236H10W 72/252H10W 70/098H10W 70/69H10W 70/66H10W 70/65H10W 20/023H10W 20/0261H10W 70/635H01L 23/49838H01L 23/49894H01L 23/49866H01L 23/49827
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Claims

Abstract

Electronic devices including intermetallic columns within vias are provided. Vias are filled with one or more pastes containing metal particles. Thermal treatment of the pastes within the vias converts the particles within the pastes to one or more intermetallic compounds that do not melt during next level packaging.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . An electronic device comprising:
 a wafer;   a plurality of vias within the wafer, and   a plurality of electrically conductive columns filling the vias, each of the columns consisting essentially of one or more intermetallic compounds, the intermetallic compounds comprising at least one of tin and indium.   
     
     
         2 . The electronic device of  claim 1 , wherein the columns consist essentially of Cu 6 Sn 5 . 
     
     
         3 . The electronic device of  claim 2 , wherein the wafer comprises silicon or glass and the vias have aspect ratios between three and thirty. 
     
     
         4 . The electronic device of  claim 2 , wherein each intermetallic column has a diameter between 2-100 μm. 
     
     
         5 . The electronic device of  claim 1 , wherein the intermetallic columns comprise tin and at least one of copper and nickel. 
     
     
         6 . The electronic device of  claim 5 , wherein the vias have aspect ratios between three and thirty and each column has a diameter between 5-50 μm. 
     
     
         7 . The electronic device of  claim 1 , wherein the vias extend through the wafer.

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