Array substrate, method for producing the same and display apparatus

Abstract

The present disclosure provides an array substrate, a method for producing the same and a display apparatus. The array substrate comprises: a substrate; a touch electrode wiring pattern formed on the substrate, the touch electrode wiring pattern comprising a plurality of touch electrode wirings; a common electrode pattern formed on the substrate, the common electrode pattern being insulated from the touch electrode wiring pattern and comprising a plurality of block electrodes spaced mutually, wherein the common electrode pattern is also used as a touch electrode pattern, and wherein each of the touch electrode wirings is connected correspondingly to one of the block electrodes in the common electrode pattern.

What is claimed is: 
     
         1 . An array substrate comprising:
 a substrate;   a touch electrode wiring pattern formed on the substrate, the touch electrode wiring pattern comprising a plurality of touch electrode wirings;   a common electrode pattern formed on the substrate, the common electrode pattern being insulated from the touch electrode wiring pattern and comprising a plurality of block electrodes spaced mutually,   wherein the common electrode pattern is also used as a touch electrode pattern, and wherein each of the touch electrode wirings is connected correspondingly to one of the block electrodes in the common electrode pattern.   
     
     
         2 . The array substrate according to  claim 1 , wherein the touch electrode wiring pattern is located outside each pixel opening region of the array substrate. 
     
     
         3 . The array substrate according to  claim 1 , wherein the common electrode pattern has a gap in a region corresponding vertically to the touch electrode wiring pattern. 
     
     
         4 . The array substrate according to  claim 3 , wherein the block electrodes in the common electrode pattern has the gap in a region corresponding vertically to the touch electrode wirings in the touch electrode wiring pattern. 
     
     
         5 . The array substrate according to  claim 1 , wherein the touch electrode wiring pattern is located outside a region corresponding vertically to a data line pattern on the array substrate. 
     
     
         6 . The array substrate according to  claim 5 , further comprising a shielding line pattern formed in the same layer as the touch electrode wiring pattern on the array substrate, the shielding line pattern being formed in the region corresponding to the data line pattern and configured to shield an electrical field generated by the data line pattern. 
     
     
         7 . The array substrate according to  claim 1 , wherein the touch electrode wiring pattern is formed in a region corresponding to a black matrix of a color filter substrate. 
     
     
         8 . The array substrate according to  claim 7 , wherein the common electrode pattern is made from indium tin oxide and the touch electrode wiring pattern is made from the same material as a gate line of the array substrate. 
     
     
         9 . The array substrate according to  claim 2 , wherein the touch electrode wiring pattern is formed between a layer arrangement in which the common electrode pattern is located and a layer arrangement in which the data line pattern on the array substrate is located. 
     
     
         10 . The array substrate according to  claim 9 , wherein the array substrate comprises an insulation arrangement formed between the layer arrangement in which the common electrode pattern is located and the layer arrangement in which the data line pattern is located, the touch electrode wiring pattern being insulated from the common electrode pattern and the data line pattern by the insulation arrangement. 
     
     
         11 . The array substrate according to  claim 3 , wherein the touch electrode wiring pattern is formed between a layer arrangement in which the common electrode pattern is located and a layer arrangement in which the data line pattern on the array substrate is located. 
     
     
         12 . The array substrate according to  claim 11 , wherein the array substrate comprises an insulation arrangement formed between the layer arrangement in which the common electrode pattern is located and the layer arrangement in which the data line pattern is located, the touch electrode wiring pattern being insulated from the common electrode pattern and the data line pattern by the insulation arrangement. 
     
     
         13 . The array substrate according to  claim 5 , wherein the touch electrode wiring pattern is formed between a layer arrangement in which the common electrode pattern is located and a layer arrangement in which the data line pattern on the array substrate is located. 
     
     
         14 . The array substrate according to  claim 13 , wherein the array substrate comprises an insulation arrangement formed between the layer arrangement in which the common electrode pattern is located and the layer arrangement in which the data line pattern is located, the touch electrode wiring pattern being insulated from the common electrode pattern and the data line pattern by the insulation arrangement. 
     
     
         15 . A method for producing an array substrate comprising:
 forming a touch electrode wiring pattern on a substrate, the touch electrode wiring pattern comprising a plurality of touch electrode wirings;   forming a common electrode pattern on the substrate formed with the touch electrode wiring pattern, the common electrode pattern being insulated from the touch electrode wiring pattern and comprising a plurality of block electrodes spaced mutually,   wherein the common electrode pattern is also used as a touch electrode pattern, and wherein each of the touch electrode wirings is connected correspondingly to one of the block electrodes in the common electrode pattern.   
     
     
         16 . The method according to  claim 15 , wherein the step of forming a common electrode pattern on the substrate comprises:
 depositing a common electrode layer and etching the common electrode layer to form the common electrode pattern,   wherein etching the common electrode layer to form the common electrode pattern comprises etching off the common electrode layer located above and corresponding vertically to the touch electrode wiring pattern.   
     
     
         17 . The method according to  claim 15 , wherein the step of forming a touch electrode wiring pattern on a substrate comprises:
 forming the touch electrode wiring pattern after the data line pattern is formed on the substrate and before the common electrode pattern is formed on the substrate.   
     
     
         18 . The method according to  claim 15 , further comprising:
 forming a shielding line pattern in a region corresponding to the data line pattern in the same layer as the touch electrode wiring pattern when the touch electrode wiring pattern is formed and located outside the region corresponding vertically to the data line pattern on the array substrate.   
     
     
         19 . The method according to  claim 15 , further comprising:
 forming an insulation arrangement between a layer arrangement in which the common electrode pattern is located and a layer arrangement in which the data line pattern is located, the touch electrode wiring pattern being insulated from the common electrode pattern and the data line pattern by the insulation arrangement,   wherein the touch electrode wiring pattern is formed between the layer arrangement in which the common electrode pattern is located and the layer arrangement in which the data line pattern on the array substrate is located.   
     
     
         20 . A display apparatus comprising the array substrate according to  claim 1 .