Methods and apparatuses for operating a data processing system

Abstract

Methods and apparatuses to manage working states of a data processing system. At least one embodiment of the present invention includes a data processing system with one or more sensors (e.g., physical sensors such as tachometer and thermistors, and logical sensors such as CPU load) for fine grain control of one or more components (e.g., processor, fan, hard drive, optical drive) of the system for working conditions that balance various goals (e.g., user preferences, performance, power consumption, thermal constraints, acoustic noise). In one example, the clock frequency and core voltage for a processor are actively managed to balance performance and power consumption (heat generation) without a significant latency. In one example, the speed of a cooling fan is actively managed to balance cooling effort and noise (and/or power consumption).

What is claimed is: 
     
         1 . A method to operate a processor of a data processing system, the method comprising:
 shifting a power supply of the processor from a first voltage to a second voltage without resetting the processor.   
     
     
         2 . A method as in  claim 1 , further comprising:
 slewing a frequency of a clock of the data processing system to transit a clock of the processor from a first frequency to a second frequency.   
     
     
         3 . A method as in  claim 2 , wherein the processor continues to execute instructions while the frequency of the clock is slewed. 
     
     
         4 . A method as in  claim 3 , wherein the processor continues to execute instructions while the power supply is shifted from the first voltage to the second voltage. 
     
     
         5 . A method as in  claim 2 , wherein the power supply is maintained at one of the first and second voltages while the frequency of the clock is slewed; and, the clock of the processor is maintained at one of the first and second frequencies while the power supply is shifted from the first voltage to the second voltage. 
     
     
         6 . A method as in  claim 2 , wherein the first frequency is higher than the second frequency; the first voltage is higher than the second voltage; and, the power supply is shifted from the first voltage to the second voltage after the clock of the processor transits from the first frequency to the second frequency. 
     
     
         7 . A method as in  claim 2 , wherein the first frequency is lower than the second frequency; the first voltage is lower than the second voltage; and, the power supply is shifted from the first voltage to the second voltage before the clock of the processor transits from the first frequency to the second frequency. 
     
     
         8 . A method as in  claim 2 , wherein said slewing a frequency of a clock comprises:
 instructing a clock chip to use a new frequency multiplier.   
     
     
         9 . A method as in  claim 1 , further comprising:
 adjusting a frequency multiplier of the processor to switch a clock of the processor from a first frequency to a second frequency.   
     
     
         10 . A method as in  claim 9 , wherein the processor is not reset during switching from the first frequency to the second frequency. 
     
     
         11 . A data processing system, comprising:
 a processor; and   a power supply coupled to the processor to energize the processor with a first voltage, the processor causing the power supply to adjust the first voltage to a second voltage without resetting the processor.   
     
     
         12 . A data processing system as in  claim 11 , further comprising:
 a clock source coupled to the processor, the processor deriving a clock of the processor from the clock source, the processor causing the clock source to slew a frequency of the clock source to transit the clock of the processor from a first frequency to a second frequency.   
     
     
         13 . A data processing system as in  claim 12 , wherein the processor continues to execute instructions while the frequency of the clock source is slewed. 
     
     
         14 . A data processing system as in  claim 13 , wherein the processor continues to execute instructions while the power supply is shifted from the first voltage to the second voltage. 
     
     
         15 . A data processing system as in  claim 12 , wherein the power supply is maintained at one of the first and second voltages while the frequency of the clock source is slewed; and, the clock of the processor is maintained at one of the first and second frequencies while the power supply is shifted from the first voltage to the second voltage. 
     
     
         16 . A data processing system as in  claim 12 , wherein the first frequency is higher than the second frequency; the first voltage is higher than the second voltage; and, the power supply is shifted from the first voltage to the second voltage after the clock of the processor transits from the first frequency to the second frequency. 
     
     
         17 . A data processing system as in  claim 12 , wherein the first frequency is lower than the second frequency; the first voltage is lower than the second voltage; and, the power supply is shifted from the first voltage to the second voltage before the clock of the processor transits from the first frequency to the second frequency. 
     
     
         18 . A data processing system as in  claim 12 , wherein the processor instructs the clock source to use a new frequency multiplier to slew the frequency of the clock source. 
     
     
         19 . A data processing system as in  claim 11 , wherein the processor adjusts a frequency multiplier of the processor to switch a clock of the processor from a first frequency to a second frequency. 
     
     
         20 . A data processing system as in  claim 19 , wherein the processor is not reset during switching from the first frequency to the second frequency. 
     
     
         21 . A machine readable medium containing executable computer program instructions which when executed by a data processing system cause said system to perform a method to operate a processor of the data processing system, the method comprising:
 shifting a power supply of the processor from a first voltage to a second voltage without resetting the processor.   
     
     
         22 . A medium as in  claim 21 , wherein the method further comprises:
 slewing a frequency of a clock of the data processing system to transit a clock of the processor from a first frequency to a second frequency.   
     
     
         23 . A medium as in  claim 22 , wherein the processor continues to execute instructions while the frequency of the clock is slewed. 
     
     
         24 . A medium as in  claim 23 , wherein the processor continues to execute instructions while the power supply is shifted from the first voltage to the second voltage. 
     
     
         25 . A medium as in  claim 22 , wherein the power supply is maintained at one of the first and second voltages while the frequency of the clock is slewed; and, the clock of the processor is maintained at one of the first and second frequencies while the power supply is shifted from the first voltage to the second voltage. 
     
     
         26 . A medium as in  claim 22 , wherein the first frequency is higher than the second frequency; the first voltage is higher than the second voltage; and, the power supply is shifted from the first voltage to the second voltage after the clock of the processor transits from the first frequency to the second frequency. 
     
     
         27 . A medium as in  claim 22 , wherein the first frequency is lower than the second frequency; the first voltage is lower than the second voltage; and, the power supply is shifted from the first voltage to the second voltage before the clock of the processor transits from the first frequency to the second frequency. 
     
     
         28 . A medium as in  claim 22 , wherein said slewing a frequency of a clock comprises:
 instructing a clock chip to use a new frequency multiplier.   
     
     
         29 . A medium as in  claim 21 , wherein the method further comprises:
 adjusting a frequency multiplier of the processor to switch a clock of the processor from a first frequency to a second frequency.   
     
     
         30 . A medium as in  claim 29 , wherein the processor is not reset during switching from the first frequency to the second frequency. 
     
     
         31 . A data processing system, comprising:
 a processor; and   means for shifting a power supply of the processor from a first voltage to a second voltage without resetting the processor.   
     
     
         32 . A data processing system as in  claim 31 , further comprising:
 means for slewing a frequency of a clock of the data processing system to transit a clock of the processor from a first frequency to a second frequency.   
     
     
         33 . A data processing system as in  claim 32 , wherein the processor continues to execute instructions while the frequency of the clock is slewed. 
     
     
         34 . A data processing system as in  claim 33 , wherein the processor continues to execute instructions while the power supply is shifted from the first voltage to the second voltage. 
     
     
         35 . A data processing system as in  claim 32 , wherein the power supply is maintained at one of the first and second voltages while the frequency of the clock is slewed; and, the clock of the processor is maintained at one of the first and second frequencies while the power supply is shifted from the first voltage to the second voltage. 
     
     
         36 . A data processing system as in  claim 32 , wherein the first frequency is higher than the second frequency; the first voltage is higher than the second voltage; and, the power supply is shifted from the first voltage to the second voltage after the clock of the processor transits from the first frequency to the second frequency. 
     
     
         37 . A data processing system as in  claim 32 , wherein the first frequency is lower than the second frequency; the first voltage is lower than the second voltage; and, the power supply is shifted from the first voltage to the second voltage before the clock of the processor transits from the first frequency to the second frequency. 
     
     
         38 . A data processing system as in  claim 32 , wherein said means for slewing a frequency of a clock comprises:
 means for instructing a clock chip to use a new frequency multiplier.   
     
     
         39 . A data processing system as in  claim 31 , further comprising:
 means for adjusting a frequency multiplier of the processor to switch a clock of the processor from a first frequency to a second frequency.   
     
     
         40 . A data processing system as in  claim 39 , wherein the processor is not reset during switching from the first frequency to the second frequency.