US2016204741A1PendingUtilityA1
Semiconductor device
Est. expiryApr 26, 2032(~5.8 yrs left)· nominal 20-yr term from priority
H03L 7/093H03K 3/02H03K 3/26H03K 3/011H03B 5/1237H10D 84/209H10D 1/47H01L 28/20H01L 27/092H03B 5/24H01L 27/0629
43
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Claims
Abstract
Disclosed is a semiconductor device. The semiconductor device includes a functional circuit having a resistor formed by a plurality of polysilicon resistors, and in which the property of the functional circuit can be adjusted by trimming the resistor, and in which the polysilicon resistors are coupled in series or in parallel to each other and arranged in a direction perpendicular to one side of the semiconductor device.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . An on-chip oscillator comprising:
a relaxation oscillator; a current generating circuit; and a reference voltage generating circuit outputs a first reference voltage and a second reference voltage to the relaxation oscillator, and outputs a third reference voltage to the current generating circuit, wherein the current generating circuit outputs a first current to the relaxation oscillator via a first output terminal, and a second current is outputted from the relaxation oscillator to the current generating circuit via a second output terminal, and wherein an oscillation frequency of the relaxation oscillator is based on the first current, the second current, the first reference voltage and the second reference voltage.
2 . The on-chip oscillator according to claim 1 ,
wherein the relaxation oscillator includes:
a capacitor is coupled at one end to a first power supply,
a first comparator having an inverted input terminal coupled to receive the first reference voltage and a non-inverted input terminal coupled to another end of the capacitor, and
a second comparator having an inverted input terminal coupled to receive the second reference voltage and a non-inverted input terminal coupled to the other end of the capacitor, and
a RS-type flip-flop having a set input coupled to an output of the first comparator and a reset input coupled to an output of the second comparator.
3 . The on-chip oscillator according to claim 2 , further comprising:
a first switch coupled at one end to a node coupled to the one end of the capacitor, and coupled at another end to the first output terminal, a second switch coupled at one end to the node, and coupled at another end to the second output terminal, wherein the first switch and the second switch are complementarily opened and closed based on an output of the RS-type flip-flop, and wherein the oscillation frequency of the relaxation oscillator is based on the first current, the second current, the capacitance, the first reference voltage, and the second reference voltage.
4 . The on-chip oscillator according to claim 1 ,
wherein the current generating circuit includes:
a differential amplifier having an inverted input terminal coupled to receive the third reference voltage and a non-inverted input terminal coupled to a node,
a first p-type transistor having a gate coupled to an output of the differential amplifier, a second p-type transistor having a gate coupled to an output of the differential amplifier, and a third p-type transistor having a gate coupled to an output of the differential amplifier,
a first n-type transistor having a gate coupled to a drain thereof and a source coupled to a first power supply, and a second n-type transistor having a gate coupled to the gate of the first n-type transistor and a source coupled to the first power supply, and
a resistor having one end coupled to a drain of the first p-type transistor and the node, and another end coupled to the first power supply
5 . The on-chip oscillator according to claim 4 ,
wherein the resistor has a plurality of first resistors coupled in series to each other, wherein a plurality of switches are respectively coupled to the first resistors, and each of the switches is coupled in parallel to one of the first resistors, and wherein the switches are adjusted so that the on-chip oscillator outputs a clock having a desired oscillation frequency.
6 . The on-chip oscillator according to claim 4 ,
wherein a constant current flows through the resistor based on the third reference voltage and a value of the resistor.
7 . The on-chip oscillator according to claim 6 ,
wherein the second p-type transistor, the third p-type transistor, the first n-type transistor and the second n-type transistor are configured as a current mirror circuit, wherein the current mirror circuit mirrors the constant current which flows through the resistor.
8 . The on-chip oscillator according to claim 7 ,
wherein the current mirror circuit outputs the first current and the second current.
9 . The on-chip oscillator according to claim 4 ,
wherein a source of the first p-type transistor, a source of the second p-type transistor, and a source of the third p-type transistor are each coupled to a second power supply.
10 . The on-chip oscillator according to claim 4 ,
wherein the drain of the third p-type transistor is coupled to the first output terminal, and the drain of the second n-type transistor is coupled to the second output terminal.
11 . The on-chip oscillator according to claim 5 ,
wherein the first resistors have respective resistance values of R, 2 R, 4 R, 8 R, 16 R, 32 R, 64 R, 128 R and 256 R, where R is a predetermined value.
12 . The on-chip oscillator according to claim 5 ,
wherein the desired oscillation frequency is determined from the first reference voltage, the second reference voltage, the third reference voltage, a value of the capacitor and a value of the resistor.
13 . The on-chip oscillator according to claim 5 ,
wherein the first resistors are polysilicon.
14 . The on-chip oscillator according to claim 5 ,
wherein the first resistors are polysilicon and are disposed in a rectangular pattern.
15 . The on-chip oscillator according to claim 5 ,
wherein the first resistors are polysilicon doped with impurities.
16 . The on-chip oscillator according to claim 1 , wherein the first current charges the capacitor, and the capacitor discharges the second current.
17 . An on-chip oscillator comprising:
a relaxation oscillator; a current generating circuit; and a reference voltage generating circuit outputs a first reference voltage and a second reference voltage to the relaxation oscillator, and outputs a third reference voltage to the current generating circuit, wherein the current generating circuit outputs a first current to the relaxation oscillator via a first output terminal, and a second current is outputted from the relaxation oscillator to the current generating circuit via a second output terminal, wherein the relaxation oscillator includes:
a capacitor coupled at one end to a first power supply,
a first comparator coupled to receive the first reference voltage and coupled to another end of the capacitor, and
a second comparator coupled to receive the second reference voltage and coupled to the other end of the capacitor,
wherein the current generating circuit includes:
a resistor coupled at one end to the first power supply,
a differential amplifier coupled to receive the third reference voltage and coupled to another end of the resistor, and
a first p-type transistor having a gate coupled to an output of the differential amplifier, a source coupled to a second power supply, and a drain coupled to the other end of the resistor, and
wherein an oscillation frequency of the relaxation oscillator is based on the first current, the second current, the first reference voltage, the second reference voltage, a value of the capacitor and a value of the resistor.Join the waitlist — get patent alerts
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