Semiconductor device

Abstract

The semiconductor device 100 comprises a first semiconductor element 113 provided on a face on one side of a flat plate shaped interconnect component 101 , an insulating resin 119 covering a face of a side where the first semiconductor element 113 of the interconnect component 101 is provided and a side face of the first semiconductor element 113 , and a second semiconductor element 111 provided on a face on the other side of the interconnect component 101 . The interconnect component 101 has a constitution where an interconnect layer 103 , a silicon layer 105 and an insulating film 107 are sequentially formed. The interconnect layer 103 has a constitution where the interconnect layer 103 has a flat plate shaped insulating component and a conductive component extending through the insulating component. The first semiconductor element 113 is electrically connected with the second semiconductor element 111 through the conductive component.

What is claimed is: 
     
         1 . A semiconductor device comprising:
 a wiring member having a first surface, a second surface opposite the first surface, a silicon layer formed between the first and second surface, a plurality of wirings formed on the silicon layer, a first through electrode penetrating the silicon layer, and a first external electrode being arranged on the second surface; and   a first semiconductor chip having a first main surface on which a first electrode is formed and being mounted on the first surface of the wiring member such that the first main surface of the first semiconductor chip faces the first surface of the wiring member,   wherein one end portion of the first through electrode of the silicon layer is electrically connected with the first electrode of the first semiconductor chip,   wherein the other end portion of the first through electrode of the silicon layer is electrically connected with the first external electrode of the wiring member, and   wherein a passive element is formed on the silicon layer and is electrically connected with the wirings on the silicon layer.   
     
     
         2 . The semiconductor device according to  claim 1 ,
 wherein an active element is formed on the silicon layer and is electrically connected with the wirings on the silicon layer.   
     
     
         3 . The semiconductor device according to  claim 1 , further comprising:
 a second semiconductor chip having a second main surface on which a second electrode is formed and being mounted over the first surface of the wiring member such that the second main surface of the second semiconductor chip faces the first surface of the wiring member and such that the second semiconductor chip is arranged side by side with the first semiconductor chip on the first surface of the wiring member,   wherein the first semiconductor chip includes a third electrode which formed on the first mains surface, and   wherein the third electrode of the first semiconductor chip is electrically connected with the second electrode of the second semiconductor chip.   
     
     
         4 . The semiconductor device according to  claim 3 ,
 wherein the third electrode of the first semiconductor chip is arranged closer to the second semiconductor chip than the first electrode of the first semiconductor chip.   
     
     
         5 . The semiconductor device according to  claim 3 ,
 wherein the wiring member includes a second through electrode which penetrates the silicon layer of the wiring member and a second external electrode which is arranged on the second surface of the wiring member,   wherein the second semiconductor includes a fourth electrode which is formed on the second main surface,   wherein one end portion of the second through electrode of the silicon layer is electrically connected with the fourth electrode of the second semiconductor chip, and   wherein the other end portion of the second through electrode of the silicon layer is electrically connected with the second external electrode of the wiring member.   
     
     
         6 . The semiconductor device according to  claim 5 ,
 wherein the fourth electrode of the second semiconductor chip is arranged closer to the first semiconductor chip than the second electrode of the second semiconductor chip.   
     
     
         7 . The semiconductor device according to  claim 3 ,
 Wherein the first semiconductor chip is a memory chip.   
     
     
         8 . The semiconductor device according to  claim 8 ,
 wherein the second semiconductor chip is a logic chip for controlling the memory chip.