Methods of forming contact structures for semiconductor devices and the resulting devices

Abstract

A device includes a first epi semiconductor material positioned in a source/drain region of the device, the first epi semiconductor material having a first lateral width at an upper surface thereof. An extended-height epi contact structure having an upper surface and first and second side surfaces is positioned on the first epi semiconductor material, the upper surface and the first and second side surfaces collectively defining a contact length of the extended-height epi contact structure that is greater than the first lateral width. A metal silicide region is positioned on the upper surface and the first and second side surfaces of the extended-height epi contact structure.

What is claimed: 
     
         1 . A device, comprising:
 a first epi semiconductor material positioned in a source/drain region of said device, said first epi semiconductor material having a first lateral width at an upper surface thereof;   an extended-height epi contact structure positioned on said first epi semiconductor material, said extended-height epi contact structure having an upper surface and first and second side surfaces, wherein said upper surface and said first and second side surfaces collectively define a contact length of said extended-height epi contact structure that is greater than said first lateral width; and   a metal silicide region positioned on said upper surface and said first and second side surfaces of said extended-height epi contact structure.   
     
     
         2 . The device of  claim 1 , wherein a portion of said metal silicide region is positioned horizontally adjacent to a layer of insulating material. 
     
     
         3 . The device of  claim 1 , wherein said first epi semiconductor material and said extended-height epi contact structure comprise a substantially same semiconductor material. 
     
     
         4 . The device of  claim 1 , wherein said first epi semiconductor material and said extended-height epi contact structure are different semiconductor materials. 
     
     
         5 . The device of  claim 1 , further comprising a conductive contact structure conductively coupled to said metal silicide region. 
     
     
         6 . The device of  claim 1 , further comprising at least one gate structure positioned laterally adjacent to at least a portion of said extended height epi contact structure and at least a portion of said first epi semiconductor material. 
     
     
         7 . The device of  claim 6 , wherein said at least one gate structure comprises a high-k/metal gate configuration. 
     
     
         8 . The device of  claim 1 , wherein at least a portion of said extended height epi contact structure and at least a portion of said first epi semiconductor material are positioned between and laterally adjacent to a first gate structure and a second gate structure. 
     
     
         9 . The device of  claim 8 , wherein at least one of said extended height epi contact structure and said first epi semiconductor material contact a sidewall spacer positioned adjacent to one of said first gate structure and said second gate structure. 
     
     
         10 . A device, comprising:
 a first epi semiconductor material positioned in a source/drain region of said device, said first epi semiconductor material having a first lateral width at a first upper surface thereof;   an extended-height epi contact structure positioned above said first epi semiconductor material, said extended-height epi contact structure comprising:
 a first contact structure portion positioned on said first upper surface of said first epi semiconductor material, said first contact structure portion having a second lateral width at a second upper surface thereof that is greater than said first lateral width; and 
 a second contact structure portion positioned on said second upper surface of said first contact structure portion, said second contact structure portion having a third lateral width at a third upper surface thereof that is less than said second lateral width; and 
   a metal silicide region positioned on at least first and second side surfaces and said third upper surface of said second contact structure portion.   
     
     
         11 . The device of  claim 10 , wherein said first and second side surfaces and said third upper surface of said second contact structure portion collectively define a contact length of said extended-height epi contact structure that is greater than said first lateral width of said first upper surface of said first epi semiconductor material. 
     
     
         12 . The device of  claim 10 , wherein said second contact structure portion covers a first surface portion of said second upper surface of said first contact structure portion but does not cover a second surface portion of said second upper surface of said first contact structure portion. 
     
     
         13 . The device of  claim 10 , wherein said second surface portion of said first contact structure portion, said first and second side surfaces of said second contact structure portion, and said third upper surface of said second contact structure portion collectively define a contact length of said extended-height epi contact structure that is greater than said first lateral width of said first upper surface of said first epi semiconductor material. 
     
     
         14 . The device of  claim 10 , wherein a layer of insulating material is positioned horizontally adjacent to and laterally surrounds a portion of said metal silicide region. 
     
     
         15 . The device of  claim 10 , wherein said first contact structure portion and said second contact structure portion comprise a substantially same semiconductor material. 
     
     
         16 . The device of  claim 10 , wherein said first contact structure portion and said second contact structure portion are different semiconductor materials. 
     
     
         17 . The device of  claim 10 , wherein a gate structure of said device comprises a high-k/metal gate configuration. 
     
     
         18 . The device of  claim 10 , further comprising a conductive contact structure conductively coupled to said metal silicide region. 
     
     
         19 . A device, comprising:
 a first epi semiconductor material positioned in a source/drain region of said device, said first epi semiconductor material having a first lateral width at a first upper surface thereof;   an extended-height epi contact structure positioned on said first epi semiconductor material, said extended-height epi contact structure comprising:
 a first contact structure portion positioned on said first upper surface of said first epi semiconductor material; and 
 a second contact structure portion positioned on a second upper surface of said first contact structure portion, said second contact structure portion covering a first surface portion of said second upper surface but not a second surface portion of said second upper surface, wherein said second surface portion of said first contact structure portion, first and second side surfaces of said second contact structure portion, and a third upper surface of said second contact structure portion collectively define a contact length of said extended-height epi contact structure that is greater than said first lateral width of said first upper surface of said first epi semiconductor material; and 
   a metal silicide region positioned on said second surface portion of said first contact structure portion and said first and second side surfaces and said third upper surface of said second contact structure portion.   
     
     
         20 . The device of  claim 19 , further comprising a conductive contact structure conductively coupled to said metal silicide region.