US2016172201A1PendingUtilityA1

Manufacturing method of semiconductor device

Assignee: RENESAS ELECTRONICS CORPPriority: Jul 28, 2014Filed: Feb 22, 2016Published: Jun 16, 2016
Est. expiryJul 28, 2034(~8 yrs left)· nominal 20-yr term from priority
H10P 14/69433H10P 14/69215H10D 64/01H10D 30/696H10D 30/0413H10D 64/037H01L 21/28282H01L 29/401H01L 29/66833H01L 29/42344H01L 21/02164H01L 21/0217H01L 27/11573H10B 43/50H10B 43/40H10B 43/00H10B 43/35
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Claims

Abstract

The present invention improves the performance of a semiconductor device. In a manufacturing method of a semiconductor device, sacrificial oxide films are formed over the side surface of a control gate electrode formed in a memory cell region, the surface of a cap insulating film formed in the memory cell region, and the surface of the part, which remains in a peripheral circuit region, of an insulating film. The step of forming the sacrificial oxide films includes the steps of: oxidizing the side surface of the control gate electrode by a thermal oxidation method; and oxidizing the surface of the cap insulating film and the surface of the part, which remains in the peripheral circuit region, of the insulating film by an ISSG oxidation method.

Claims

exact text as granted — not AI-modified
1 - 15 . (canceled) 
     
     
         16 . A manufacturing method of a semiconductor device, comprising the steps of:
 (a) providing a semiconductor substrate;   (b) forming a first insulating film over both a first region and a second region of a main surface of the semiconductor substrate;   (c) forming a first conductive film over the first insulating film;   (d) forming a silicon nitride film over the first conductive film;   (e) patterning the first insulating film, the silicon nitride film and the first conductive film so as to form a first gate electrode comprised of the first conductive film over the first region, a first gate insulating layer comprised of the first insulating film between the first gate electrode and the semiconductor substrate, a first cap insulating layer comprised of the silicon nitride film over the first gate electrode, a first conductive layer comprised of the first conductive film over the second region, a first insulating layer comprised of the first insulating film between the first conductive layer and the semiconductor substrate, a second cap insulating layer comprised of the silicon nitride film over the first conductive layer,   (f) forming a second insulating film on a surface of the second cap insulating layer;   (g) after the step (f), covering the first cap insulating layer, the first gate electrode and the first gate insulating layer with a resist film;   (h) after the step (g), removing the second insulating film and the second cap insulating layer,   (i) after the step (h), removing the resist film,   (j) after the step (i), forming a stacked insulating layer over the first cap insulating layer, the first gate electrode and the first gate insulating layer,   (k) after the step (j), forming a second gate electrode over the stacked insulating layer such that a second gate electrode is arranged adjacent to both the first gate electrode and the first cap insulating layer via the stacked insulating layer,   wherein, a material of the second insulating film is different from that of the second cap insulating layer.   
     
     
         17 . A manufacturing method of a semiconductor device according to  claim 16 ,
 wherein, the second insulating film is comprised of an oxide film.   
     
     
         18 . A manufacturing method of a semiconductor device according to  claim 17 ,
 wherein, the second insulating film is in contact with the surface of the second cap insulating layer.   
     
     
         19 . A manufacturing method of a semiconductor device according to  claim 18 ,
 wherein at the step (f), the second insulating film is formed by an ISSG oxidation method.   
     
     
         20 . A manufacturing method of a semiconductor device according to  claim 18 , including the steps of:
 (1) after the step (k), patterning the first conductive layer and the first insulating layer so as to form a third gate electrode comprised of the first conductive layer over the second region and a second gate insulating layer comprised of the first insulating layer between the third gate electrode and the semiconductor substrate.   
     
     
         21 . A manufacturing method of a semiconductor device according to  claim 20 ,
 wherein at the step (j), the stacked insulating layer includes a lower silicon oxide layer, an upper silicon oxide layer and a silicon nitride layer between the upper silicon oxide layer and the lower silicon oxide layer.   
     
     
         22 . A manufacturing method of a semiconductor device according to  claim 20 , including the steps of:
 (m) after the step (e) and before the step (f), forming a third insulating film comprised of a oxide film on a side surface of the first gate electrode,   wherein at the step (f), the second insulating film is also formed on a surface of the first cap insulating layer.   
     
     
         23 . A manufacturing method of a semiconductor device according to  claim 22 , including the steps of:
 (n) after the step (i) and before the step (j), removing the second cap insulating layer on the surface of the first cap insulating layer and the third insulating film on the side surface of the first gate electrode.   
     
     
         24 . A manufacturing method of a semiconductor device according to  claim 20 ,
 wherein the semiconductor device has a nonvolatile memory, and   wherein the nonvolatile memory is comprised of the first gate electrode and the second gate electrode.   
     
     
         25 . A manufacturing method of a semiconductor device according to  claim 20 ,
 wherein the first conductive film is comprised of a polycrystal silicon film.

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