US2016165729A1PendingUtilityA1
Electronic circuit assembly substrate and device thereof
Est. expiryAug 28, 2034(~8.1 yrs left)· nominal 20-yr term from priority
H10W 90/724H10W 90/288H10W 90/20H10W 72/823H10W 72/252H10W 72/072H10W 70/6875H10W 70/698H10W 70/635H10W 70/69H10W 70/685H10W 90/00H10D 86/85H05K 2201/032H05K 1/115H05K 1/18H05K 1/032H05K 1/181H05K 3/4644H05K 1/053H05K 1/16H05K 3/445H05K 3/4053
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Claims
Abstract
A methodology for a thin, flexible substrate having integrated passive circuit elements, and the resulting device are disclosed. Embodiments may include integrating one or more passive circuit components on a first or second surface of a substrate, and interconnecting one or more integrated circuit (IC) dies on a second surface of the interposer to the one or more passive circuit components with one or more metal-filled vias between the first and second surfaces, the first and second surfaces being opposite surfaces of the substrate.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A device comprising:
one or more passive circuit components integrated on a first side of a substrate assembly; and one or more integrated circuit (IC) dies on the first or a second side of the substrate assembly interconnected to the one or more passive circuit components with one or more metal-filled vias between the first and second sides, wherein the first and second sides are opposite sides of the substrate assembly.
2 . The device of claim 1 , further comprising:
a carbon-based or metal-based substrate different from silicon (Si) and FR4 that has a coefficient of thermal expansion (CTE) matched to that of Si.
3 . The device of claim 2 , wherein the carbon-based or metal-based substrate has a CTE from 1 to 11 ppm/° C.
4 . The device of claim 1 , further comprising:
a paper substrate coated with alumina or a multilayer dielectric that has low permeability to oxygen and moisture.
5 . The device of claim 1 , further comprising:
a substrate formed from NILO® alloy 42, Invar®, Kovar®, other nickel-iron (Ni—Fe) alloys, titanium (Ti) alloys, chromium (Cr), tungsten (W), high chromium iron, aluminum (Al), stainless steel, or paper and having a thickness from 25 to 300 microns (μm).
6 . The device of claim 1 , further comprising:
a substrate with one or more openings; and a conformal dielectric layer on all surfaces of the substrate, wherein the one or more metal-filled vias include a solder, tungsten (W), copper (Cu), titanium (Ti), Silver (Ag), or other metal-based paste.
7 . The device of claim 1 , further comprising:
a patterned metal layer formed on a first surface of a carbon-based or a metal-based substrate; and an insulating layer formed over the patterned metal layer and the first surface of the carbon-based or metal-based substrate; wherein the one or more passive circuit components integrated on the first side of the substrate assembly are located in the insulating layer on the patterned metal layer.
8 . The device of claim 7 , wherein the patterned metal layer has a thickness from 100 Angstrom (Å) to 3 microns (μm) and is formed to overlap at least one of the one or more metal-filled vias.
9 . The device of claim 1 , wherein the one or more passive circuit components comprise a precision resistor, an inductor, a metal-insulator-metal (MIM) capacitor, or a combination thereof.
10 . The device of claim 1 , wherein the one or more IC dies are mounted on the first or second side of the substrate assembly on one or more solder balls at the one or more metal-filled vias.
11 . A device comprising:
a substrate; at least one passive circuit component integrated on a first surface of the substrate; and at least one integrated circuit (IC) die interconnected on the first or a second surface of the substrate to the at least one passive circuit component; at least one metal-filled via between the first and second surfaces, wherein the first and second surfaces are opposite surfaces of the substrate, and wherein the substrate comprises a carbon-based or metal-based material different from silicon (Si) and FR4, has a coefficient of thermal expansion (CTE) matched to that of Si, and further comprises alumina or a multilayer dielectric that has low permeability to oxygen and moisture on a paper substrate.
12 . The device of claim 11 , wherein the substrate has a CTE from 1 to 11 ppm/° C.
13 . The device of claim 11 , wherein the substrate has a thickness from 25 to 300 microns (μm).
14 . The device of claim 11 , further comprising
a conformal dielectric layer on all exposed surfaces of the substrate; and wherein the at least one metal-filled vias comprises solder, tungsten (W), copper (Cu), silver (Ag), titanium (Ti), or other metal-based paste.
15 . The device of claim 11 , wherein the integrated at least one passive circuit component on the first surface of the substrate comprises:
a patterned metal layer formed on the first surface of the substrate; an insulating layer on the patterned metal layer and on exposed surfaces of the first surface of the substrate; and the at least one passive circuit component in the insulating layer at the patterned metal layer.
16 . The device of claim 11 , wherein the at least one IC die is mounted on the first or second surface of the substrate using at least one solder ball at the one or more metal-filled vias.
17 . A device comprising:
a substrate comprising alumina or other dielectric that has low permeability to oxygen and moisture on a paper substrate; one or more metal filled vias in the substrate, the one or more metal filled vias comprising one or more openings filled with solder, tungsten (W), copper (Cu), titanium (Ti), silver (Ag) or other metal-based paste; a conformal dielectric layer on all exposed surfaces of the substrate; a patterned metal layer on the conformal dielectric layer on one side of the substrate; an insulating layer on the one side of the substrate over the patterned metal layer; one or more passive circuit components in the insulating layer integrated on the patterned metal layer; one or more solder balls on another side of the substrate at the one or more metal-filled vias; and one or more integrated circuit (IC) dies mounted on the one or more solder balls, wherein the one side and the another side correspond to opposite surfaces of the substrate.
18 . The device of claim 17 , wherein the substrate comprises a carbon-based or metal-based material different from silicon (Si) and FR4 and has a coefficient of thermal expansion (CTE) matched to that of Si.Join the waitlist — get patent alerts
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