Memory device

Abstract

In a memory device, memory capacity per unit area is increased while a period in which data is held is ensured. The memory device includes a driver circuit provided over a substrate, and a plurality of memory cell arrays which are provided over the driver circuit and driven by the driver circuit. Each of the plurality of memory cell arrays includes a plurality of memory cells. Each of the plurality of memory cells includes a first transistor including a first gate electrode overlapping with an oxide semiconductor layer, and a capacitor including a source electrode or a drain electrode, a first gate insulating layer, and a conductive layer. The plurality of memory cell arrays is stacked to overlap. Thus, in the memory device, memory capacity per unit area is increased while a period in which data is held is ensured.

1 . A memory device comprising:
 a driver circuit; and   a plurality of memory cell arrays which is provided over the driver circuit and is configured to be driven by the driver circuit,   wherein each of the plurality of memory cell arrays comprises a plurality of memory cells arranged in matrix,   wherein each of the plurality of memory cells comprises a first transistor comprising an oxide semiconductor layer, and   wherein the plurality of memory cell arrays is stacked to overlap.