Semiconductor device and method for controlling semiconductor device

Abstract

To provide a semiconductor device having a thin-film BOX-SOI structure and capable of realizing a high-speed operation of a logic circuit and a stable operation of a memory circuit. A semiconductor device according to the present invention includes a semiconductor support substrate, an insulation layer having a thickness of at mast 10 nm, and a semiconductor layer. In an upper surface of the semiconductor layer, a first field-effect transistor including a first gate electrode and constituting a logic circuit is formed. Further, in the upper surface of the semiconductor layer, a second field-effect transistor including a second gate electrode and constituting a memory circuit is formed. At least three well regions having different conductivity types are formed in the semiconductor support substrate. In the presence of the well regions, a region of the semiconductor support substrate below the first gate electrode and a region of the semiconductor support substrate below the second gate electrode are electrically separated from each other.

1 - 8 . (canceled) 
     
     
         9 . A method for controlling a semiconductor device, the device comprising:
 a semiconductor support substrate;   an insulation layer formed on said semiconductor support substrate and having a thickness of at most 10 nm;   a semiconductor layer formed on said insulation film;   a first field-effect transistor formed in an upper surface of said semiconductor layer and including a first gate electrode to constitute a logic circuit; and   a second field-effect transistor formed in the upper surface of said semiconductor layer, electrically insulated from said first field-effect transistor by an element separation film formed in a surface of said semiconductor layer and including a second gate electrode to constitute a memory circuit,   said semiconductor support substrate of a first conductivity type having, at least below said first gate electrode, a first well of a second conductivity type and a second well of the first conductivity type formed in said first well, the method comprising the steps of:   applying a forward bias of said first field-effect transistor to a region of said semiconductor support substrate below said first gate electrode; and   applying a backward bias of said second field-effect transistor to a region of said semiconductor support substrate below said second gate electrode.