US2016149077A1PendingUtilityA1

Light-emitting diode and method for manufacturing the same

Assignee: LEXTAR ELECTRONICS CORPPriority: Feb 8, 2013Filed: Jan 29, 2016Published: May 26, 2016
Est. expiryFeb 8, 2033(~6.6 yrs left)· nominal 20-yr term from priority
H10H 20/831H10H 20/032H10H 20/8316H10H 20/833H10H 20/832H10H 20/819H10H 20/81H10H 20/01Y10S977/95Y10S977/734H10H 20/816H01L 33/20H01L 33/387H01L 2933/0016H01L 33/005H01L 33/14H01L 33/40H01L 33/0008
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Claims

Abstract

The disclosure provides a light-emitting diode and a method for manufacturing the same. The light-emitting diode comprises a N-type metal electrode, a N-type semiconductor layer contacted with the N-type metal electrode, a P-type semiconductor layer, a light-emitting layer interposed between the N-type semiconductor layer and the P-type semiconductor layer, a low-contact-resistance material layer positioned on the P-type semiconductor layer, a transparent conductive layer covered the low-contact-resistance material layer and the P-type semiconductor layer, and a P-type metal electrode positioned on the transparent conductive layer.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A method for manufacturing a light-emitting diode, comprising:
 providing a substrate;   forming an N-type semiconductor layer on the substrate, wherein the N-type semiconductor layer is in a mesa structure having a first area and a second area, and the first area is higher than the second area;   forming a light-emitting layer on the first area of the N-type semiconductor layer;   forming a P-type semiconductor layer on the light-emitting layer;   forming a low-contact-resistance material layer on part of the P-type semiconductor layer;   forming a transparent conductive layer on the low-contact-resistance material layer and the P-type semiconductor layer; and   forming individually an N-type metal electrode on the second area of the N-type semiconductor layer, and a P-type metal electrode on the transparent conductive layer.   
     
     
         2 . The method of  claim 1 , wherein the low-contact-resistance material layer surrounds the P-type metal electrode, or is positioned between vertical projection areas of the P-type metal electrode and the N-type metal electrode. 
     
     
         3 . The method of  claim 1 , wherein the low-contact-resistance material layer is in a round-hole pattern, a stripe pattern, a lattice pattern, or a combination thereof. 
     
     
         4 . The method of  claim 1 , wherein the material of the low-contact-resistance material layer is graphene or a metal selected from the group comprising of nickel (Ni), gold (Au), chromium (Cr), platinum (Pt), rhodium (Rh), titanium (Ti), aluminum (AD, silver (Ag), copper (Cu) and the combinations thereof. 
     
     
         5 . The method of  claim 1 , wherein the thickness of the low-contact-resistance material layer is in a range of 0.1 nm to 1000 nm. 
     
     
         6 . The method of  claim 1 , further comprising forming a metal-indium contact layer positioned between the P-type semiconductor layer and the low-contact-resistance material layer, and the transparent conductive layer covers the low-contact-resistance material layer and the metal-indium contact layer. 
     
     
         7 . The method of  claim 6 , wherein the metal-indium contact layer is an indium tin oxide (ITO) layer. 
     
     
         8 . A method for manufacturing a light-emitting diode, comprising:
 providing an N-type semiconductor layer having a first surface and a second surface opposite to the first surface;   forming a light-emitting layer on the first surface of the N-type semiconductor layer;   forming a P-type semiconductor layer on the light-emitting layer;   forming a low-contact-resistance material layer surrounding the P-type semiconductor layer;   forming a transparent conductive layer on the low-contact-resistance material layer and the P-type semiconductor layer; and   forming individually a P-type metal electrode on the transparent conductive layer, and an N-type metal electrode on the second surface of the N-type semiconductor layer.   
     
     
         9 . The method of  claim 8 , wherein the low-contact-resistance material layer completely or partially surrounds the P-type metal electrode. 
     
     
         10 . The method of  claim 8 , wherein the low-contact-resistance material layer is in a round-hole pattern, a stripe pattern, a lattice pattern, or a combination thereof. 
     
     
         11 . The method of  claim 8 , wherein the material of the low-contact-resistance material layer is graphene or a metal selected from the group comprising of nickel (Ni), gold (Au), chromium (Cr), platinum (Pt), rhodium (Rh), titanium (Ti), aluminum (Al), silver (Ag), copper (Cu) and the combinations thereof. 
     
     
         12 . The method of  claim 8 , wherein the thickness of the low-contact-resistance material layer is in a range of 0.1 nm to 1000 nm.

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