US2016148845A1PendingUtilityA1

Semiconductor device and manufacturing method thereof

Assignee: RENESAS ELECTRONICS CORPPriority: Aug 24, 2012Filed: Nov 24, 2015Published: May 26, 2016
Est. expiryAug 24, 2032(~6.1 yrs left)· nominal 20-yr term from priority
H10D 64/011H10P 10/00H10D 88/00H10D 86/201H10D 84/0186H10D 84/0181H10D 84/0165H10D 84/85H10D 84/07H10D 30/6755H10D 84/0167H10D 84/038H01L 29/7869H01L 21/823871H01L 21/823807
50
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Claims

Abstract

A semiconductor device is provided which includes an N-type semiconductor layer and a P-type semiconductor layer coexisting in the same wiring layer without influences on the properties of a semiconductor layer. The semiconductor device includes a first wiring layer with a first wiring, a second wiring layer with a second wiring, and first and second transistors provided in the first and second wiring layers. The first transistor includes a first gate electrode, a first gate insulating film, a first oxide semiconductor layer, a first hard mask layer, and first insulating sidewall films covering the sides of the first oxide semiconductor layer. The second transistor includes a second gate electrode, a second gate insulating film, a second oxide semiconductor layer, and a second hard mask layer.

Claims

exact text as granted — not AI-modified
1 - 18 . (canceled) 
     
     
         19 . A method for manufacturing a semiconductor device, comprising the steps of:
 (a) forming a first wiring over a semiconductor device;   (b) forming a first interlayer insulating layer over the first wiring;   (c) forming a first gate electrode and a second gate electrode so as to be embedded in the first interlayer insulating layer;   (d) forming a first semiconductor layer via a first gate insulating film over the first gate electrode;   (e) forming a first insulating film over the first insulating layer so as to cover the first semiconductor layer;   (f) forming a sidewall film to cover a side of the first semiconductor layer by etching the first insulating film;   (g) after step (f), forming a second semiconductor layer via a second gate insulating film over the second gate electrode.   
     
     
         20 . The manufacturing method of the semiconductor device according to  claim 19 ,
 wherein the first and second gate insulating films are formed at the same time and are formed between steps (c) and (d).   
     
     
         21 . The manufacturing method of the semiconductor device according to  claim 20 ,
 wherein after step (f), the second gate insulating film is thinner than the first gate insulating film.   
     
     
         22 . The manufacturing method of the semiconductor device according to  claim 19 ,
 wherein a first transistor comprises the first gate electrode, the first gate insulating film and the first semiconductor layer,   wherein a second transistor comprises the second gate electrode, the second gate insulating film and the second semiconductor layer, and   wherein the first transistor and the second transistor are transistors of opposite conductive types to form a complementary metal-oxide semiconductor.   
     
     
         23 . The manufacturing method of the semiconductor device according to  claim 22 ,
 wherein the first transistor is p-type,   wherein the second transistor is n-type.   
     
     
         24 . The manufacturing method of the semiconductor device according to  claim 19 ,
 wherein the first semiconductor layer and the second semiconductor layer include an InGaZnO layer, an InZnO layer, a ZnO layer, a ZnAlO layer, a ZnCuO layer, a NiO layer, a SnO layer, a SnO 2  layer, a CuO layer, a Cu 2 O layer, a Ta 2 O 5  layer or a TiO 2  layer.   
     
     
         25 . The manufacturing method of the semiconductor device according to  claim 19 ,
 wherein the second gate insulating film is thinner than the first gate insulating film.   
     
     
         26 . The manufacturing method of the semiconductor device according to  claim 24 , further comprising steps of:
 (h) forming a second interlayer insulating layer over the first and second semiconductor layers, and   (i) by etching the second interlayer insulating layer, forming a first contact hole on the first semiconductor layer and forming a second contact hole on the second semiconductor layer.

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