Error correcting decoding apparatus for decoding low-density parity-check codes

Abstract

A decoder 5 applies decode processing to N input data in parallel to generate K decode data. An S/P converter 6 outputs N input data applied in series to decoder 5 through first lines L 1 -L 64 dividedly over several times. A P/S converter 7 receives through second lines R 1 -R 60 the K decode data from decoder 5 dividedly over several times to output in series the K decoded data to an external source.

1 . (canceled) 
     
     
         10 . An error correcting decoding apparatus for performing decoding of low-density-parity-check (LDPC) code in units of code length N, comprising:
 a first storage unit for storing N input data, the N input data being LDPC code;   a decoder for decoding the N input data by applying LDPC matrix to the N input data; and   B1 first lines connecting the first storage unit with the decoder, where B1 is a natural number of at least 2 and less than N, wherein:   the first storage unit provides the stored N input data to the decoder through the B1 first lines dividedly over several times,   a parallel number of input data provided in each time is up to B1, and   the decoder decodes the N input data, which are provided from the first storage unit, in parallel.   
     
     
         11 . The error correcting decoding apparatus according to  claim 10 , wherein:
 the first storage unit includes B1 dual port memories, each having one input and one output,   the B1 dual port memories store the N input data, and   the B1 port memories and the B1 first lines are connected in a one-to-one correspondence.   
     
     
         12 . The error correcting decoding apparatus according to  claim 10 , wherein:
 the first storage unit includes B1 dual port memories, each having one input and one output,   each dual port memory stores in duplication the N input data,   the B1 dual port memories and the B1 first lines are connected in a one-to-one correspondence, and   each dual port memory outputs data among the N input data, differing from each other.   
     
     
         13 . The error correcting decoding apparatus according to  claim 10 , wherein B1 is a common divisor of N. 
     
     
         14 . A method of receiving input data by a decoder included in an error correcting decoding apparatus, the method comprising:
 receiving, by the decoder, the N input data through B1 first lines dividedly over several times, the N input data being low-density-parity-check (LDPC) code,   wherein:   the decoder is configured to decode the N input data in parallel by applying LDPC matrix to the N input data,   the B1 first lines are connected to the decoder,   the decoder receives the input data through the B1 first lines,   B1 is a natural number of at least 2 and less then N, and   a parallel number of input data received in each time is up to B1.   
     
     
         15 . An error correcting decoding apparatus for performing decoding of low-density-parity-check (LDPC) code in units of decode length K, comprising:
 a decoder for decoding input data in parallel to generate K decode data by applying LDPC matrix to the input data, the input data being LDPC code;   a second storage unit for storing the K decode data; and   B2 second lines connecting the decoder with the second storage unit, where B2 is a natural number of at least 2 and less then K, wherein:   the decoder outputs the K decode data to the second storage unit through the B2 second lines dividedly over several times,   a parallel number of decode data outputted in each time is up to B2, and the second storage unit stores the K decode data received from the decoder dividedly over several times.   
     
     
         16 . The error correcting decoding apparatus according to  claim 15 , wherein:
 the second storage unit includes B2 dual port memories, each having one input and one output,   the B2 dual port memories store the K decode data, and   the B2 dual port memories and the B2 second lines are connected in a one-to-one correspondence.   
     
     
         17 . The error correcting decoding apparatus according to  claim 15 , wherein B2 is a common divisor of K. 
     
     
         18 . A method of outputting decoded data by a decoder included in an error correcting decoding apparatus, the method comprising:
 outputting, by the decoder, K decode data through B2 second lines dividedly over several times,   wherein the decoder is configured to decode input data in parallel to generate the K decode data by applying low-density-parity-check (LDPC) matrix to the input data,   the B2 second lines are connected to the decoder,   the decoder outputs the decode data through the B2 second lines, and   B2 is a natural number of at least 2 and less than K, and   a parallel number of decode data outputted in each time is up to B2.