Semiconductor device and method of manufacturing the same
Abstract
A semiconductor device is inhibited from being degraded in reliability. The semiconductor device has a tab including a top surface, a bottom surface, and a plurality of side surfaces. Each of the side surfaces of the tab has a first portion continued to the bottom surface of the tab, a second portion located outwardly of the first portion and continued to the top surface of the tab, and a third portion located outwardly of the second portion and continued to the top surface of the tab to face the same direction as each of the first and second portions. In planar view, the outer edge of the semiconductor chip is located between the third portion and the second portion of the tab, and the outer edge of an adhesive material fixing the semiconductor chip to the tab is located between the semiconductor chip and the second portion.
Claims
exact text as granted — not AI-modified1 - 22 . (canceled)
23 . A semiconductor device, comprising:
a first semiconductor chip having a first main surface over which a plurality of first pads are formed, a first back surface opposite the first main surface, and a first side surface located between the first main surface and the first back surface; a first chip mounting portion having a first upper surface over which the first semiconductor chip is mounted via a first adhesive material, a first lower surface opposite the first upper surface, and a second side surface located between the first upper and lower surfaces; a plurality of leads arranged around the first chip mounting portion in a plan view; a plurality of wires electrically connecting the plurality of first pads of the first semiconductor chip with the plurality of leads, respectively; and a resin sealing body sealing the first semiconductor chip, the first chip mounting portion, and a part of each of the leads such that the first lower surface of the first chip mounting portion is exposed from the resin sealing body, wherein the second side surface has a first part and a second part, wherein the first part has a first surface intersecting with the first lower surface of the first chip mounting portion, and a second surface intersecting with the first upper surface of the first chip mounting portion, wherein the second part has the first surface, and a second surface intersecting with the first upper surface of the first chip mounting portion, wherein, in cross-section view of the first part, the first side surface of the first semiconductor chip is located between the first surface of the first part and the second surface of the first part, wherein, in cross-section view of the second part, the first side surface of the first semiconductor chip is located between the first surface of the second part and the second surface of the second part, and wherein the second surface of the second part is protruded toward outside more than the second surface of the first part.
24 . The semiconductor device according to claim 23 , wherein an area of the first semiconductor chip is greater than an area of the first lower surface of the first chip mounting portion.
25 . The semiconductor device according to claim 23 , wherein the first part and the second part are arranged adjacent to each other.
26 . The semiconductor device according to claim 23 ,
wherein each of the plurality of leads has an inner side surface which faces to the second surface of the second part, and wherein a planarity level of the second surface of each of the first and second parts is lower than a planarity level of the inner side surface.Join the waitlist — get patent alerts
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