Semiconductor device package with integrated antenna for wireless applications

Abstract

A semiconductor device package is provided with integrated antenna for wireless applications. The semiconductor device package comprises a substrate including a semiconductor chip mounted thereon: a protective layer covering the semiconductor chip; a metal pattern mounted on the protective layer; and a first connective member connecting the semiconductor chip and the metal pattern. According to this configuration, the semiconductor device package is capable of being easily manufactured while minimizing the electrical distance between the metal pattern for use as an antenna and the semiconductor chip.

What is claimed is: 
     
         1 . A method of manufacturing a semiconductor package, the method comprising:
 preparing a substrate including at least one semiconductor chip mounted thereon;   connecting one end of a first connective member to the at least one semiconductor chip;   covering the semiconductor chip using a protective layer; and   forming a metal pattern on an upper surface of the protective layer and connecting the metal pattern and the other end of the first connective member.   
     
     
         2 . The method of  claim 1 , further comprising, after the covering of the at least one semiconductor chip, grinding the protective layer such that a height from an upper surface of the at least one semiconductor chip to the upper surface of the protective layer is equal to a preset height. 
     
     
         3 . The method of  claim 1 , wherein the first connective member has a coil shape. 
     
     
         4 . The method of  claim 1 , wherein the metal pattern includes a first antenna pattern transceiving a high frequency signal in the millimeter wave band and a second antenna pattern transceiving a WiFi signal in a low frequency band. 
     
     
         5 . The method of  claim 1 , wherein the connecting of the one end of the first connective member to the at least one semiconductor chip further includes connecting the substrate and one end of a second connective member, and
 the forming of the metal pattern on the upper surface of the protective layer and the connecting of the metal pattern and the other end of the first connective member further includes connecting the metal pattern and the other end of the second connective member.   
     
     
         6 . The method of  claim 1 , further comprising cutting a completed semiconductor package into predetermined module units. 
     
     
         7 . The method of  claim 1 , further comprising melting a portion of the protective layer such that the other end of the first connective member is exposed, and forming a conductive layer in the melted portion such that the other end of the first connective member is stably connected to the metal pattern. 
     
     
         8 . The method of  claim 1 , wherein the first connective member is formed at the time of wire-bonding the at least one semiconductor chip and the substrate.