Analysis of Stimulus by RFID

Abstract

The present invention is directed to a process for manufacturing a capacitor for an RFID device. The process utilizes stencils to spray-coat capacitor electrodes about a substrate, and in other embodiments, the process spray coats a first capacitor on a substrate, then an insulator on the first capacitor, and then a second capacitor on the insulator.

What is claimed is: 
     
         1 . A process for manufacturing a capacitor for an RFID device, said process comprising:
 positioning a first electrode stencil, proximate to an insulated RFID substrate, having a first electrode void with a substantially two-dimensional representation of a predetermined capacitor first electrode area;   spray-coating at least one first electrode layer on said substrate through said void to form a first electrode occupying less than 25% of a surface area of said substrate;   applying a second electrode stencil, proximate to said RFID substrate, having a second electrode void with a substantially two-dimensional representation of a predetermined capacitor second electrode area; and   spray-coating at least one second electrode layer on said substrate through said second electrode void, concentric with and opposite of said first electrode, to form a second electrode of surface area approximately equal to said first electrode to fabricate a capacitor as a first circuit component; and   affixing a second circuit component on said substrate in electrical communication with said capacitor via a conductor affixed to said substrate.   
     
     
         2 . The process of  claim 1  wherein said positioning step includes positioning said first electrode stencil having a first electrode void with said substantially two-dimensional representation of said predetermined capacitor first electrode area and a first capacitor lead. 
     
     
         3 . The process of  claim 1  wherein said applying step includes applying said second electrode stencil having said second electrode void with said substantially two-dimensional representation of said predetermined capacitor second electrode area and a second capacitor lead. 
     
     
         4 . The process of  claim 1  wherein said applying step includes applying said second electrode stencil having said second electrode void with a substantially two-dimensional representation of said predetermined capacitor second electrode area and a second capacitor lead. 
     
     
         5 . The process of  claim 4  wherein said positioning step includes positioning said first electrode stencil having said first electrode void with said substantially two-dimensional representation of said predetermined capacitor first electrode area and a first capacitor lead. 
     
     
         6 . An RFID circuit comprising:
 an insulated substrate, having an upper surface and lower surface bearing a conductive trace;   a first electrode affixed to said upper surface of said substrate in electrical communication with said conductive trace;   a second electrode affixed to said lower surface of said substrate, concentric with and opposite of said first electrode, in electrical communication with said conductive trace, wherein said first electrode, second electrode, and said substrate constitute a capacitor;   a circuit component affixed to said substrate and joined to said conductive trace.   
     
     
         7 . The RFID circuit of  claim 6  wherein said first electrode occupies less than 25% of said upper surface of said substrate.