US2016118484A1PendingUtilityA1

Bipolar Transistor with Enclosed Sub Areas and a Method for Manufacturing Such a Bipolar Transistor

Assignee: INFINEON TECHNOLOGIES AGPriority: Jul 11, 2013Filed: Dec 30, 2015Published: Apr 28, 2016
Est. expiryJul 11, 2033(~7 yrs left)· nominal 20-yr term from priority
H10D 62/8325H10D 62/177H10D 62/137H10D 10/421H10D 10/80H10D 10/051H10D 10/021H10D 10/221H10D 10/01H10D 12/031H10D 10/40H10D 10/00H01L 29/1608H01L 29/66272H01L 29/0821H01L 29/732H01L 29/1004
49
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

A bipolar transistor includes a semiconductor structure having an emitter area of a first conductivity type electrically connected to an emitter contact of the bipolar transistor, a base area of a second conductivity type electrically connected to a base contact of the bipolar transistor, and a collector area of the first conductivity type electrically connected to a collector contact of the bipolar transistor. The collector area encloses sub areas of the second conductivity type, or the base area encloses sub areas of the first conductivity type. A doping concentration of the enclosed sub area and a doping concentration of the collector area or base area is selected so that a lateral integral of the doping concentration of the p-doped regions and a lateral integral of the doping concentration of the n-doped regions are basically equal.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A bipolar transistor comprising a semiconductor structure, the semiconductor structure comprising:
 an emitter area electrically connected to an emitter contact of the bipolar transistor, the emitter area comprising a first conductivity type;   a base area electrically connected to a base contact of the bipolar transistor, the base area comprising a second conductivity type; and   a collector area electrically connected to a collector contact of the bipolar transistor, the collector area comprising the first conductivity type;   wherein the collector area encloses sub areas comprising the second conductivity type, or the base area encloses sub areas comprising the first conductivity type,   wherein a doping concentration of the enclosed sub area and a doping concentration of the collector area or base area is selected so that a lateral integral of the doping concentration of the p-doped regions and a lateral integral of the doping concentration of the n-doped regions are basically equal.   
     
     
         2 . The bipolar transistor of  claim 1 , wherein the enclosed sub areas occupy less than 50% of a volume of the base area or the collector area containing the enclosed sub areas. 
     
     
         3 . The bipolar transistor of  claim 1 , wherein an average dopant density of the enclosed sub areas is higher than an average dopant density of a region of the base area or the collector area arranged between the enclosed sub areas. 
     
     
         4 . The bipolar transistor of  claim 1 , wherein at least a part of the enclosed sub areas comprises a vertical dimension being larger than a lateral dimension in a lateral direction, or at least one of the enclosed sub areas is ball-shaped. 
     
     
         5 . The bipolar transistor of  claim 1 , wherein at least a part of the enclosed sub areas comprises a rectangular, circular or elliptic footprint. 
     
     
         6 . The bipolar transistor of  claim 1 , wherein the base area comprises solely the second conductivity type and the collector area comprises the enclosed sub areas. 
     
     
         7 . The bipolar transistor of  claim 1 , wherein the collector area comprises a plurality of enclosed sub areas comprising the second conductivity type and the base area comprises a plurality of enclosed sub areas comprising the first conductivity type. 
     
     
         8 . The bipolar transistor of  claim 1 , wherein the collector area comprises a substrate layer with a first dopant density and a drift layer comprising a second dopant density, wherein the drift layer is arranged between the substrate layer and the base area, wherein the first dopant density is higher than the second dopant density, wherein the enclosed sub areas are located within the drift layer. 
     
     
         9 . The bipolar transistor of  claim 8 , wherein at least a part of the enclosed sub areas extends from the drift area into the substrate area. 
     
     
         10 . The bipolar transistor of  claim 8 , wherein the collector area further comprises a field stop layer arranged between the drift layer and the substrate layer, and wherein the field stop layer comprises a third dopant density between the first dopant density and the second dopant density. 
     
     
         11 . The bipolar transistor of  claim 1 , wherein the emitter area, the base area and the collector area are at least partly arranged in a vertically stacked manner. 
     
     
         12 . The bipolar transistor of  claim 1 , wherein the emitter area, the base area and the collector area are at least partly manufactured within a common semiconductor layer of the semiconductor structure. 
     
     
         13 . The bipolar transistor of  claim 1 , wherein the emitter area is electrically connected to an emitter contact of the bipolar transistor arranged at a first side of the semiconductor structure, wherein the base area is electrically connected to a base contact of the bipolar transistor arranged at the first side of the semiconductor structure, and wherein the collector area is electrically connected to a collector contact of the bipolar transistor arranged at a second side of the semiconductor structure opposite to the first side of the semiconductor structure. 
     
     
         14 . The bipolar transistor of  claim 1 , wherein the bipolar transistor has a blocking voltage of more than 500V. 
     
     
         15 . The bipolar transistor of  claim 1 , wherein the semiconductor structure is a silicon carbide based semiconductor structure, a silicon based semiconductor structure, a gallium arsenide based semiconductor structure or a gallium nitride based semiconductor structure. 
     
     
         16 . A method for manufacturing a bipolar transistor, the method comprising:
 manufacturing a semiconductor structure comprising an emitter area electrically connected to an emitter contact of the bipolar transistor, a base area electrically connected to a base contact of the bipolar transistor and a collector area electrically connected to a collector contact of the bipolar transistor;
 wherein the emitter area, the base area and the collector area are arranged in a semiconductor substrate; 
 wherein the semiconductor substrate is a silicon carbide based substrate; 
 wherein the emitter area comprises a first conductivity type, wherein the base area comprises a second conductivity type, wherein the collector area comprises the first conductivity type; 
 wherein the collector area encloses sub areas comprising the second conductivity type; and 
   manufacturing the emitter contact, the base contact and the collector contact of the bipolar transistor;
 wherein the manufacturing of the semiconductor structure comprises: 
   depositing of a silicon carbide drift layer of the collector area on top of a silicon carbide substrate layer of the collector area;   etching a plurality of trenches into the drift layer;   filling the plurality of trenches with material comprising the second conductivity type so that the enclosed sub areas are obtained within the plurality of trenches;   depositing a silicon carbide layer comprising the second conductivity type representing the base area on top of the drift layer; and   depositing a silicon carbide layer comprising the first conductivity type representing the emitter area on top of the base area.

Join the waitlist — get patent alerts

Track US2016118484A1 — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.