US2016111322A1PendingUtilityA1
Finfet semiconductor device having local buried oxide
Est. expiryNov 18, 2033(~7.3 yrs left)· nominal 20-yr term from priority
H10P 32/1406H10P 32/171H10P 14/40H10W 10/181H10P 90/1908H10D 30/024H10D 30/62H10D 30/798H01L 29/66795H01L 21/2253H01L 21/283H01L 21/76243
48
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Claims
Abstract
There is set forth herein in one embodiment a FinFET semiconductor device having a fin extending from a bulk silicon substrate, wherein there is formed wrapped around a portion of the fin a gate, and wherein proximate a channel area of the fin aligned to the gate there is formed a local buried oxide region aligned to the gate. In one embodiment, the local buried oxide region is formed below a channel area of the fin.
Claims
exact text as granted — not AI-modified1 . A method comprising:
forming a substrate having a fin extending therefrom, said fin being contiguous with the substrate; forming a local buried oxide region in the fin; forming a gate, wherein the local buried oxide region is under the gate; defining a channel in the fin above the local buried oxide region, the channel being aligned to the gate and having a first end and a second end; forming a source at the first end of the channel; and forming a drain at the second end of the channel.
2 . The method of claim 1 , wherein one or more of the source includes an extension.
3 . The method of claim 1 , wherein the source includes means for reducing a short channel effect.
4 . The method of claim 3 , wherein the means for reducing a short channel effect includes a source extension implant.
5 . The method of claim 1 , wherein the local buried oxide region is at least partially formed in the fin.
6 . The method of claim 1 , wherein the local buried oxide region is entirely formed in the fin.
7 . The method of claim 1 , wherein the local buried oxide region is partially formed in the fin and partially formed in the substrate.
8 . The method of claim 1 , wherein an area of the substrate below an elevation of a base of the fin includes an area of the local buried oxide region.
9 . The method of claim 1 , wherein the semiconductor device is a silicon wafer having a plurality of fins extending upwardly from the substrate, wherein fins of the plurality of fins have formed therein local buried oxide regions.
10 . The method of claim 1 , wherein the channel is aligned to the gate.
11 . The method of claim 1 , wherein one or more of the source and drain comprises an epitaxial growth formation.
12 . The method of claim 1 , wherein each of the source and drain comprises an epitaxial growth formation.
13 . The method of claim 1 , wherein the source includes means for inducing stress in the channel.
14 . A method comprising:
forming a local buried oxide region in a fin extending contiguous from a substrate; and fabricating a gate, wherein the fabricating is performed so that the local buried oxide region is under the gate.
15 . The method of claim 14 , wherein the forming includes ion implantation of oxygen.
16 . The method of claim 14 , wherein the forming includes ion implantation of oxygen with one or more of N, C and F.
17 . The method of claim 14 , wherein the fabricating includes using a gate first fabrication process.
18 . The method of claim 14 , wherein the fabricating includes using a gate last fabrication process.
19 . The method of claim 14 , wherein the forming includes forming the buried oxide region so that the local buried oxide region is entirely formed in the fin.
20 . A method comprising:
forming a substrate having a fin contiguous with the substrate extending therefrom; forming a local buried oxide region; forming a gate aligned with the local buried oxide region; defining a channel in the fin, the channel being aligned to the gate and having a first end and a second end; defining a source at the first end of the channel; and defining a drain at the second end of the channel, wherein the local buried oxide region is at least partially formed in the fin, and wherein the local buried oxide region is formed under the gate but not under the source or drain.Join the waitlist — get patent alerts
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