Vapor deposition of metal oxides, silicates and phosphates, and silicon dioxide
Abstract
Metal silicates or phosphates are deposited on a heated substrate by the reaction of vapors of alkoxysilanols or alkylphosphates along with reactive metal amides, alkyls or alkoxides. For example, vapors of tris(tert-butoxy)silanol react with vapors of tetrakis(ethylmethylamido)hafnium to deposit hafnium silicate on surfaces heated to 300° C. The product film has a very uniform stoichiometry throughout the reactor. Similarly, vapors of diisopropylphosphate react with vapors of lithium bis(ethyldimethylsilyl)amide to deposit lithium phosphate films on substrates heated to 250° C. Supplying the vapors in alternating pulses produces these same compositions with a very uniform distribution of thickness and excellent step coverage.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A microelectronic device comprising:
an insulating metal oxide layer; wherein the insulating metal oxide layer is prepared by a process comprising: exposing a substrate alternately to a vapor of a first reactant component and a vapor of a second reactant component; wherein deposition of the first reactant component and the second reactant component are self-limiting; wherein said first reactant component comprises a metal alkylamide; wherein said second reactant component interacts with the deposited first reactant component to form the insulating metal oxide layer; and wherein said insulating metal oxide layer comprises oxygen and the metal from the metal alkylamide.
2 . The microelectronic device of claim 1 , wherein the insulating metal oxide layer insulates a gate or capacitor.
3 . The microelectronic device of claim 2 , wherein the metal alkylamide is a hafnium dialkylamide.
4 . The microelectronic device of claim 3 , wherein the hafnium dialkylamide is tetrakis(ethylmethylamido)hafnium.
5 . The microelectronic device of claim 3 , wherein the hafnium dialkylamide is tetrakis(dimethylamido)hafnium.
6 . The microelectronic device of claim 3 , wherein the hafnium dialkylamide is tetrakis(diethylamido)hafnium.
7 . The microelectronic device of claim 2 , wherein the metal alkylamide is a zirconium dialkylamide.
8 . The microelectronic device of claim 7 , wherein the zirconium dialkylamide is tetrakis(ethylmethylamido)zirconium.
9 . The microelectronic device of claim 7 , wherein the zirconium dialkylamide is tetrakis(dimethylamido)zirconium.
10 . The microelectronic device of claim 7 , wherein the zirconium dialkylamide is tetrakis(diethylamido)zirconium.
11 . The microelectronic device of claim 1 , wherein the substrate has a hole and the insulating metal oxide layer conformally coats said hole.
12 . The microelectronic device of claim 11 , wherein the hole has a length to diameter ratio of greater than 40.
13 . The microelectronic device of claim 11 , wherein the hole comprises a trench.
14 . The microelectronic device of claim 11 , wherein the substrate comprises silicon.
15 . The microelectronic device of claim 11 , wherein the insulating metal oxide layer has a thickness that varies by less than 1%.
16 . A microelectronic device comprising:
an insulating metal oxide layer; wherein the insulating metal oxide layer is prepared by a process comprising: introducing a vapor of a first reactant component into a deposition chamber; introducing a vapor of a second reactant component into the deposition chamber; alternately repeating the introduction of the first reactant component and the second reactant component; wherein deposition of the first reactant component and the second reactant component are self-limiting; wherein said first reactant component comprises a metal alkylamide; wherein said second reactant component interacts with the deposited first reactant component to form the insulating metal oxide layer; and wherein said insulating metal oxide layer comprises oxygen and the metal from the metal alkylamide.
17 . The microelectronic device of claim 16 , wherein the insulating metal oxide layer insulates a gate or capacitor.
18 . The microelectronic device of claim 17 , wherein the metal alkylamide is a hafnium dialkylamide.
19 . The microelectronic device of claim 18 , wherein the hafnium dialkylamide is tetrakis(ethylmethylamido)hafnium.
20 . The microelectronic device of claim 18 , wherein the hafnium dialkylamide is tetrakis(dimethylamido)hafnium.
21 . The microelectronic device of claim 18 , wherein the hafnium dialkylamide is tetrakis(diethylamido)hafnium.
22 . The microelectronic device of claim 17 , wherein the metal alkylamide is a zirconium dialkylamide.
23 . The microelectronic device of claim 22 , wherein the zirconium dialkylamide is tetrakis(ethylmethylamido)zirconium.
24 . The microelectronic device of claim 22 , wherein the zirconium dialkylamide is tetrakis(dimethylamido)zirconium.
25 . The microelectronic device of claim 22 , wherein the zirconium dialkylamide is tetrakis(diethylamido)zirconium.
26 . The microelectronic device of claim 16 , wherein the substrate has a hole and the insulating metal oxide layer conformally coats said hole.
27 . The microelectronic device of claim 26 , wherein the hole has a length to diameter ratio of greater than 40.
28 . The microelectronic device of claim 26 , wherein the hole comprises a trench.
29 . The microelectronic device of claim 26 , wherein the substrate comprises silicon.
30 . The microelectronic device of claim 26 , wherein the insulating metal oxide layer has a thickness that varies by less than 1%.Join the waitlist — get patent alerts
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