Semiconductor device and inverter system

Abstract

A semiconductor device includes first and second resistor groups, first and second switch groups, a register, and an amplifier. The first resistor group includes plural first resistors connected in series between a first terminal and an output of the amplifier. The first switch group includes plural first switches. Each of the first switches is connected between a corresponding one of the connection point between the first resistors and the inverting input terminal of the amplifier. The second resistor group includes plural second resistors connected in series between a second terminal of the amplifier and a reference voltage source. The second switch group includes plural second switches. Each of the second switches is connected between a corresponding one of the connection point between the second resistors and a positive input terminal of the amplifier. The register selects each of first and second switches.

What is claimed is: 
     
         1 . A semiconductor device, comprising:
 an amplifier having an inverting input terminal and a noninverting input terminal;   a gain switching resistor group having a plurality of first resistors, the first resistors connected in series between a first input terminal and an output of the amplifier;   a first switch group having a plurality of first switches, each of the first switches coupled between a corresponding one of connection points of the first resistors and the inverting input terminal of the amplifier;   an offset adjustment resistor group having a plurality of second resistors, the second resistors coupled in series between a second input terminal and a reference voltage; and   a second switch group having a plurality of second switches, each of the second switches coupled between a corresponding one of connection points of the second resistors and the non-inverting input terminal of the amplifier.   
     
     
         2 . The semiconductor device according to  claim 1 ,
 wherein a sum of resistance values of the first resistors is equal to a sum of resistance values of the second resistors.   
     
     
         3 . The semiconductor device according to  claim 2 ,
 wherein a sum of resistance values from a first resistor subsequent to a connection point of a selected first switch to a first resistor on an end of an output side of the first amplifier among the plurality of first resistors is equal to a sum of resistance values from a second resistor subsequent to a connection point of a selected second switch to a second resistor on an end of the reference voltage side among the plurality of second resistors.   
     
     
         4 . The semiconductor device according to  claim 3 ,
 wherein a resistance value of an m-th (m is a natural number) resistor in the plurality of first resistors is equal to a resistance value of an m-th resistor in the plurality of second resistors.   
     
     
         5 . The semiconductor device according to  claim 1 , further comprising: a reference voltage source that is connected to the other end of the offset adjustment resistor group, and changeably applies the reference voltage. 
     
     
         6 . The semiconductor device according to  claim 5 ,
 wherein the reference voltage source includes:   a reference voltage setting register that sets a value of the reference voltage;   a digital/analog converter that converts a set value of the reference voltage setting register into an analog set value; and   a second amplifier that amplifies the set value converted into the analog.   
     
     
         7 . The semiconductor device according to  claim 1 ,
 wherein the setting register includes:   a first setting register that selects one of the plurality of first switches to turn on the selected first switch; and   a second setting register that selects one of the plurality of second switches to turn on the selected second switch.   
     
     
         8 . The semiconductor device according to  claim 1 ,
 wherein the gain switching resistor group, the first switch group, the offset adjustment resistor group, the second switch group, the setting register, and the first amplifier are disposed for each of a U-phase, a V-phase, and a W-phase.   
     
     
         9 . The semiconductor device according to  claim 6 ,
 wherein an output impedance of the first amplifier is equal to an output impedance of the second amplifier.   
     
     
         10 . The semiconductor device according to  claim 1 ,
 wherein the plurality of first resistors and the plurality of second resistors are laid out symmetrically with respect to a point.   
     
     
         11 . The semiconductor device according to  claim 1 , further comprising:
 an analog/digital converter that subjects an output voltage of the first amplifier to analog/digital conversion to generate an output signal; and   a control circuit that generates a drive signal for controlling a current of the inverter circuit on the basis of the output signal.