Data processing device and method of controlling the same
Abstract
A data processing device includes an instruction execution unit that executes a first task, a second task and an interrupt task, a counter that counts an execution time of one of the first task and the interrupt task, a first storage unit that stores a set value to start the counter when the execution unit executes one of the first task and the interrupt task, a second storage unit that stores the set value stored in the first storage unit when the instruction execution unit switches from an execution of the first task to an execution of the second task, and a memory that stores the set value stored in the first storage unit when the instruction unit switches from the execution of the first task to an execution of the interrupt task.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A data processing device, comprising:
an instruction execution unit that executes a first task, a second task and an interrupt task; a counter that counts an execution time of one of the first task and the interrupt task; a first storage unit that stores a set value to start the counter when the execution unit executes one of the first task and the interrupt task; a second storage unit that stores the set value stored in the first storage unit when the instruction execution unit switches from an execution of the first task to an execution of the second task; and a memory that stores the set value stored in the first storage unit when the instruction unit switches from the execution of the first task to an execution of the interrupt task, wherein, when the instruction execution unit switches from the execution of the second task to the execution of the first task, the first storage unit stores the set value stored in the second storage unit, and wherein, when the instruction execution unit switches from the execution of the interrupt task to the execution of the first task, the first storage unit stores the set value stored in the memory.
2 . The data processing device according to claim 1 , wherein, when the instruction execution unit switches from the execution of the first task to the execution of the interrupt task, the instruction execution unit executes a saving operation and the second storage unit stores the set value stored in the first storage unit, and
wherein the memory stores the set value stored in the second storage unit when the saving operation is executed.
3 . The data processing device according to claim 1 , wherein, when the instruction execution unit switches from the execution of the interrupt task to the execution of the first task, the instruction execution unit executes a recovery operation and the second storage unit stores the set value stored in the memory, and
wherein the first storage unit stores the set value stored in the second storage unit when the instruction execution unit executes the first task.
4 . The data processing device according to claim 1 , wherein the counter starts to count the execution time in synchronization with a time when the set value is set.
5 . The data processing device according to claim 1 , wherein, when the instruction unit executes the interrupt task, an interruption prohibition period is set, and
wherein the execution time of the interrupt task counted by the counter is adjusted by the interruption prohibition period.
6 . The data processing device according to claim 1 , wherein each of the first and second storage units includes a set terminal to set the set value and a reset terminal to reset the set value.Join the waitlist — get patent alerts
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