Semiconductor device

Abstract

A semiconductor device used for a semiconductor relay includes: a first diode; a second diode; an electric field shield film for covering the second semiconductor island region, where the second diode is formed; and a wiring for electrically connecting the first diode to the second diode. The wiring is arranged so as to cross above a silicon oxide film surrounding the second semiconductor island region. The electric field shield film is positioned below the wiring, and has a cutout portion in an overlapping region which overlaps the wiring. By forming the cutout portion, end portions of the electric field shield film is arranged to be shifted. Therefore, formation of a deep concave portion which is based on a concave portion on the silicon oxide film and a step of the electric field shield film over the entire width of the wiring can be prevented, and the disconnection of the wiring can be prevented.

What is claimed is: 
     
         1 . A semiconductor relay including a light-emitting element, a first MISFET, a second MISFET and a semiconductor chip, the semiconductor chip comprising:
 a first semiconductor island region formed above a support body and surrounded by a first insulating region;   a second semiconductor island region formed above the support body and surrounded by a second insulating region;   a third semiconductor island region formed above the support body and surrounded by a third insulating region;   a fourth semiconductor island region formed above the support body and surrounded by a fourth insulating region;   a first diode formed in the first semiconductor island region;   a second diode formed in the second semiconductor island region;   a third diode formed in the third semiconductor island region;   a fourth diode formed in the fourth semiconductor island region;   an electric field shield film for covering the third semiconductor island region and the fourth semiconductor island region;   a first wiring electrically connecting the first diode to the third diode; and   a second wiring electrically connecting the second diode to the fourth diode,   wherein the first wiring crosses above the third insulating region, the second wiring crosses above the fourth insulating region, and the electric field shield film is positioned below the first wiring and the second wiring, and has a first cutout portion in an overlapping region which overlaps the first wiring and a second cutout portion in an overlapping region which overlaps the second wiring.   
     
     
         2 . The semiconductor relay of  claim 1 , wherein each of the first diode and the second diode is a photovoltaic diode that generates an electromotive force by using light from the light-emitting element. 
     
     
         3 . The semiconductor relay of  claim 2 , further comprising: a plurality of series-connected photovoltaic diodes are provided between the first diode and the second diode, and the first diode, the second diode, and the plurality of photovoltaic diodes are arranged in an array form. 
     
     
         4 . The semiconductor relay of  claim 3 , wherein the third diode has a first n-type region and a first p-type region, the fourth diode has a second n-type region and a second p-type region, the first p-type region is connected to the first diode by the first wiring, and the second n-type region is connected to the second diode by the second wiring. 
     
     
         5 . The semiconductor relay of  claim 4 , wherein the first n-type region is connected to a first pad region by a third wiring, the first pad region being connected to a gate electrode of the first MISFET and to a gate electrode of the second MISFET, and the second p-type region is connected to a second pad region by a fourth wiring, the second pad region being connected to a source electrode of the first MISFET and to a source electrode of the second MISFET. 
     
     
         6 . The semiconductor relay of  claim 5 , wherein the third diode and the fourth diode forms a control circuit for controlling gate potentials of the first MISFET and of the second MISFET.