US2016092115A1PendingUtilityA1
Implementing storage policies regarding use of memory regions
Assignee: HEWLETT PACKARD DEVELOPMENT COPriority: Sep 29, 2014Filed: Sep 29, 2014Published: Mar 31, 2016
Est. expirySep 29, 2034(~8.2 yrs left)· nominal 20-yr term from priority
G06F 3/0688G06F 3/0647G06F 3/0611G11C 29/50016G11C 2207/2236G11C 29/50012G06F 2212/1024G06F 13/161G06F 2212/502G11C 11/005G11C 2029/4402G11C 11/4076G11C 5/04G06F 12/0284G06F 2212/3042Y02D10/00G11C 11/40622
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Claims
Abstract
Example implementations relate to implementing storage policies regarding use of memory regions. In example implementations, a first memory region having a lower access latency than a second memory region may be identified. The first and second memory regions may be identical in memory type. A plurality of storage policies regarding use of the first and second memory regions may be implemented.
Claims
exact text as granted — not AI-modifiedWe claim:
1 . A system comprising:
a memory region identification module to identify a first memory region having a lower access latency than a second memory region, wherein the first and second memory regions are identical in memory type; a memory utilization module to determine memory demand; a storage policy module to implement a plurality of storage policies regarding use of the first and second memory regions; and a data relocation module to move, in response to a runtime determination that memory demand is below a threshold value, data from the second memory region to the first memory region.
2 . The system of claim 1 , wherein:
the first memory region and the second memory region are on a memory module; and the memory region identification module is further to read access latency data for the first memory region and the second memory region from a serial presence detect (SPD) read-only memory (ROM) on the memory module.
3 . The system of claim 1 , wherein:
the first memory region and the second memory region are on a memory device; and the memory region identification module is to identify, based on characteristics of the memory device, the first memory region.
4 . The system of claim 1 , wherein the storage policy module is further to:
receive, during runtime of the system, and while the storage policy module is implementing a first storage policy of the plurality of storage policies, a storage policy change command; and in response to the storage policy change command:
implement a second storage policy of the plurality of storage policies, and
stop implementing the first storage policy.
5 . The system of claim 4 , wherein:
according to the first storage policy, memory access commands are directed at the first memory region and the second memory region; according to the second storage policy, memory access commands are directed at the first memory region and not at the second memory region; and the data relocation module is further to move data from the second memory region to the first memory region in response to the storage policy change command.
6 . The system of claim 1 , further comprising a refresh management module to disable refresh cycles in the second memory region in response to a determination that copying of data from the second memory region to the first memory region is complete.
7 . The system of claim 1 , wherein:
the memory region identification module is further to identify a third memory region having an access latency different from those of the first and second memory regions, wherein the first, second, and third memory regions are identical in memory type; and the storage policy module is further to implement a third storage policy, of the plurality of storage policies, regarding use of the first, second, and third memory regions.
8 . The system of claim 1 , wherein the storage policy module is further to implement, in response to the runtime determination that memory demand is below the threshold value, a different storage policy of the plurality of storage policies instead of a currently implemented storage policy.
9 . A machine-readable storage medium encoded with instructions executable by a processor, the machine-readable storage medium comprising:
instructions to identify a first memory region having a lower access latency than a second memory region, wherein the first and second memory regions are identical in memory type; instructions to determine whether to accept storage policy change commands, regarding use of the first and second memory regions, that are received during runtime; and instructions to implement, if a storage policy change command is received while a first storage policy is implemented, and if a determination is made to accept storage policy change commands that are received during runtime, a second storage policy instead of the first storage policy.
10 . The machine-readable storage medium of claim 9 , wherein:
according to the first storage policy, memory access commands are directed at the first memory region and the second memory region; according to the second storage policy, memory access commands are directed at the first memory region and not at the second memory region; and the machine-readable storage medium further comprises instructions to move data from the second memory region to the first memory region in response to the storage policy change command.
11 . The machine-readable storage medium of claim 10 , further comprising instructions to disable refresh cycles in the second memory region in response to a determination that copying of data from the second memory region to the first memory region is complete.
12 . The machine-readable storage medium of claim 9 , wherein:
according to the first storage policy, memory access commands are directed at the first memory region and not at the second memory region; according to the second storage policy, memory access commands are directed at the first memory region and the second memory region; and the machine-readable storage medium further comprises:
instructions to disable refresh cycles in the second memory region while the first storage policy is implemented; and
instructions to enable refresh cycles in the second memory region while the second storage policy is implemented.
13 . The machine-readable storage medium of claim 9 , further comprising:
instructions to determine memory demand; and instructions to move, during runtime, and in response to a determination that memory demand is below a threshold value, data from the second memory region to the first memory region.
14 . A method comprising:
identifying a first memory region having a lower access latency than a second memory region, wherein the first and second memory regions are identical in memory type; implementing, in response to a runtime storage policy change command received while a first storage policy regarding use of the first and second memory regions is implemented, a second storage policy, regarding use of the first and second memory regions, instead of the first storage policy; and managing refresh cycles of the first or second memory region in response to the storage policy change command.
15 . The method of claim 14 , further comprising determining whether to accept storage policy change commands that are received during runtime, wherein:
according to the first storage policy, memory access commands are directed at the first memory region and the second memory region; according to the second storage policy, memory access commands are directed at the first memory region and not at the second memory region; and implementing the second storage policy comprises masking a bit of memory addresses, to which memory access commands are directed, to exclude memory addresses in the second memory region.
16 . The method of claim 15 , further comprising moving data from the second memory region to the first memory region in response to the storage policy change command.
17 . The method of claim 14 , wherein:
according to the first storage policy, memory access commands are directed at the first memory region and not at the second memory region; according to the second storage policy, memory access commands are directed at the first memory region and the second memory region; and managing refresh cycles comprises:
disabling refresh cycles in the second memory region while the first storage policy is implemented; and
enabling refresh cycles in the second memory region while the second storage policy is implemented.
18 . The method of claim 14 , further comprising:
determining memory demand; and moving, during runtime, and in response to a determination that memory demand is below a threshold value, data from the second memory region to the first memory region.
19 . The method of claim 14 , wherein:
the first memory region and the second memory region are on a memory module; and identifying the first memory region comprises reading access latency data for the first memory region and the second memory region from a serial presence detect (SPD) read-only memory (ROM) on the memory module.
20 . The method of claim 14 , wherein:
the first memory region and the second memory region are on a memory device; and the first memory region is identified based on characteristics of the memory device.Join the waitlist — get patent alerts
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