US2016087123A1PendingUtilityA1

Solar cell and method for manufacturing the same

Assignee: LG ELECTRONICS INCPriority: Sep 10, 2009Filed: Dec 7, 2015Published: Mar 24, 2016
Est. expirySep 10, 2029(~3.1 yrs left)· nominal 20-yr term from priority
Y02E10/547H10F 19/908H10F 77/703H10F 77/315H10F 77/219H10F 77/70H10F 10/146H10F 77/227H10F 10/00H01L 31/02168H01L 31/0236H01L 31/022458
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Claims

Abstract

A solar cell and a method for manufacturing the same are discussed. The solar cell includes a semiconductor substrate, a first doped region of a first conductive type, a second doped region of a second conductive type opposite the first conductive type, a back passivation layer having contact holes exposing a portion of each of the first and second doped regions, a first electrode formed on the first doped region exposed through the contact holes, a second electrode formed on the second doped region exposed through the contact holes, an alignment mark formed at one surface of the semiconductor substrate, and a textured surface that is formed at a light receiving surface of the semiconductor substrate opposite the one surface of the semiconductor substrate in which the first and second doped regions are formed.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A method for manufacturing a solar cell, the method comprising:
 forming a first doped region of a first conductive type and an alignment mark in a semiconductor substrate;   forming a second doped region in a region of the semiconductor substrate different from a formation region of the first doped region of the semiconductor substrate;   forming a back passivation layer on the semiconductor substrate, the back passivation layer having contact holes exposing a portion of each of the first doped region and the second doped region; and   forming a first electrode and a second electrode electrically connected to the first doped region and the second doped region through the contact holes, respectively.   
     
     
         2 . The method of  claim 1 , wherein the forming of the first doped region and the alignment mark includes:
 forming a first doped layer of the first conductive type in the semiconductor substrate;   forming an insulating layer on the first doped layer;   forming a first mask defining a second doped region formation area and an alignment mark formation area on the insulating layer;   selectively removing the insulating layer using the first mask to form a second mask having the same pattern as the first mask;   removing the first mask; and   removing the first doped layer in the second doped region formation area and the alignment mark formation area using the second mask.   
     
     
         3 . The method of  claim 2 , wherein when the first doped layer in the alignment mark formation area is removed, a surface of the semiconductor substrate in the alignment mark formation area is non-uniformly or isotropically etched. 
     
     
         4 . The method of  claim 2 , wherein when the first doped layer in the alignment mark formation area is removed, a light receiving surface of the semiconductor substrate is isotropically etched to form a textured surface. 
     
     
         5 . The method of  claim 2 , wherein the forming of the second doped region includes:
 doping impurities of a second conductive type into the semiconductor substrate in the second doped region formation area and the alignment mark formation area exposed by the second mask; and   removing the second mask.   
     
     
         6 . The method of  claim 5 , wherein the doping of the impurities of the second conductive type includes doping the impurities of the second conductive type into the textured surface to form a front surface field region. 
     
     
         7 . The method of  claim 6 , wherein the forming of the back passivation layer includes:
 forming the back passivation layer on the first and second doped regions and the alignment mark;   performing an alignment operation using the alignment mark; and   forming the contact holes exposing the portion of each of the first doped region and the second doped region.   
     
     
         8 . The method of  claim 7 , wherein before the contact holes are formed, an anti-reflection layer is formed on the front surface field region. 
     
     
         9 . A method for manufacturing a solar cell, the method comprising:
 forming a first doped layer of a first conductive type in a semiconductor substrate;   forming an insulating layer on the first doped layer;   forming a first mask defining a second doped region formation area and an alignment mark formation area on the insulating layer;   selectively removing the insulating layer using the first mask to form a second mask having the same pattern as the first mask and then removing the first mask;   removing the first doped layer in the second doped region formation area and the alignment mark formation area using the second mask and forming a textured surface at a light receiving surface of the semiconductor substrate;   doping impurities of a second conductive type into the semiconductor substrate in the second doped region formation area and the alignment mark formation area exposed by the second mask, and into the textured surface, and then removing the second mask;   forming a back passivation layer on the first and second doped regions and the alignment mark;   forming an anti-reflection layer on a front surface field region, the front surface field region being one that is formed by the doping of the impurities of the second conductive type into the textured surface;   forming contact holes exposing a portion of each of the first doped region and the second doped region using the alignment mark; and   forming a first electrode and a second electrode electrically connected to the first doped region and the second doped region through the contact holes, respectively.   
     
     
         10 . The method of  claim 9 , wherein, in the removing of the first doped layer, a surface of the semiconductor substrate in a formation area of the alignment mark has an etched surface that is different from the textured surface in at least one of structure and property. 
     
     
         11 . The method of  claim 10 , wherein the textured surface has an anisotropically etched surface, and the surface of the semiconductor substrate at the formation area of the alignment mark has a non-uniformly or isotropically etched surface.

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