US2016087077A1PendingUtilityA1

Method of manufacturing semiconductor device

Assignee: RENESAS ELECTRONICS CORPPriority: Nov 18, 2013Filed: Dec 4, 2015Published: Mar 24, 2016
Est. expiryNov 18, 2033(~7.3 yrs left)· nominal 20-yr term from priority
H10D 30/608H10D 64/021H10D 64/015H10D 30/0275H10D 30/021H10D 30/0223H01L 29/66575
48
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

A method of manufacturing a semiconductor device includes preparing a semiconductor substrate, forming a gate electrode on the semiconductor substrate via a gate insulating film, forming a laminated film on the semiconductor substrate so as to cover the gate electrode, the laminated film including a first insulating film and a second insulating film on the first insulating film, forming a first side wall insulating film, formed of the laminated film, on a side wall of the gate electrode by etching back the laminated film, epitaxially growing an epitaxial semiconductor layer on a portion of the semiconductor substrate which is not covered with the gate electrode and the first side wall insulating film but is exposed, forming an oxide film on a surface of the epitaxial semiconductor layer by oxidizing the surface of the epitaxial semiconductor layer, and removing the second insulating film forming the first side wall insulating film.

Claims

exact text as granted — not AI-modified
1 . A method of manufacturing a semiconductor device including a Metal Insulator Semiconductor Field Effect Transistor (MISFET), the method comprising:
 (a) preparing a semiconductor substrate;   (b) forming a gate electrode on the semiconductor substrate via a gate insulating film;   (c) forming a first insulating film on the semiconductor substrate so as to cover the gate insulating film;   (d) forming a first side wall insulating film on a side wall of the gate electrode by etching back the first insulating film;   (e) forming a first semiconductor layer on the semiconductor substrate exposed from the gate electrode and the first side wall insulating film;   (f) after the (e), removing the first side wall insulating film;   (g) after the (f), forming a first semiconductor region on both ends of the gate electrode in the semiconductor substrate;   (h) after the (g), forming a second side wall insulating film on a side wall of the gate electrode; and   (i) after the (h), forming a second semiconductor region in a region exposed from the second side wall insulating film in the first semiconductor layer.   
     
     
         2 . The method of manufacturing the semiconductor device according to  claim 1 , wherein a part of the second side wall insulating film is positioned on the first semiconductor layer. 
     
     
         3 . The method of manufacturing the semiconductor device according to  claim 2 , wherein, in the (i), the second semiconductor region is formed by ion implantation of a first impurity into the first semiconductor layer using the second side wall insulating film as a mask. 
     
     
         4 . The method of manufacturing the semiconductor device according to  claim 1 , wherein the first side wall insulating film includes a second insulating film and a third insulating film on the second insulating film, and
 wherein, in the (f), the third insulating film is removed, and the second insulating film is left.   
     
     
         5 . The method of manufacturing the semiconductor device according to  claim 4 , wherein the second insulating film includes a first silicon oxide film, and
 wherein the third insulating film is formed of a silicon nitride film.   
     
     
         6 . The method of manufacturing the semiconductor device according to  claim 4 , wherein, in the (g), the first semiconductor region is formed by ion implantation of a second impurity into the semiconductor substrate using the second insulating film positioned on a side wall of the gate electrode as a mask. 
     
     
         7 . The method of manufacturing the semiconductor device according to  claim 1 , wherein an impurity concentration of the second semiconductor region is higher than an impurity concentration of the first semiconductor region. 
     
     
         8 . The method of manufacturing the semiconductor device according to  claim 1 , wherein the gate insulating film, the gate electrode, the first semiconductor region, and the second semiconductor region configure the MISFET, and
 wherein the first semiconductor region and the second semiconductor region function as source/drain of the MISFET.   
     
     
         9 . The method of manufacturing the semiconductor device according to  claim 1 , wherein the semiconductor substrate includes a substrate, an insulating film on the substrate, and a second semiconductor layer on the insulating layer. 
     
     
         10 . The method of manufacturing the semiconductor device according to  claim 6 , further comprising:
 between the (e) and the (f), (j) forming a second silicon oxide film on a surface of the first semiconductor layer.   
     
     
         11 . The method of manufacturing the semiconductor device according to  claim 10 , wherein the ion implantation in the (g) is performed in a state that the surface of the first semiconductor layer is covered by the second silicon oxide film. 
     
     
         12 . The method of manufacturing the semiconductor device according to  claim 2 , further comprising:
 (k) after the (i), forming a silicide layer on the first semiconductor layer exposed from the second side wall insulating film.   
     
     
         13 . A method of manufacturing a semiconductor device including a Metal Insulator Semiconductor Field Effect Transistor (MISFET), the method comprising:
 (a) preparing a semiconductor substrate;   (b) forming a gate electrode on the semiconductor substrate via a gate insulating film;   (c) forming a first insulating film on the semiconductor substrate so as to cover the gate insulating film;   (d) forming a first side wall insulating film on a side wall of the gate electrode by etching back the first insulating film;   (e) forming a first semiconductor layer on the semiconductor substrate exposed from the gate electrode and the first side wall insulating film;   (f) after the (e), removing the first side wall insulating film;   (g) after the (f), forming a second side wall insulating film on a side wall of the gate electrode; and   (h) after the (g), forming a second semiconductor region in a region exposed from the second side wall insulating film in the first semiconductor layer,   wherein a part of the second side wall insulating film is positioned on the first semiconductor layer.   
     
     
         14 . A method of manufacturing a semiconductor device including a Metal Insulator Semiconductor Field Effect Transistor (MISFET), the method comprising:
 (a) preparing a semiconductor substrate;   (b) forming a gate electrode on the semiconductor substrate via a gate insulating film;   (c) forming a first insulating film on the semiconductor substrate so as to cover the gate insulating film;   (d) forming a first side wall insulating film on a side wall of the gate electrode by etching back the first insulating film;   (e) forming a first semiconductor layer on the semiconductor substrate exposed from the gate electrode and the first side wall insulating film;   (f) after the (e), forming a second side wall insulating film on a side wall of the gate electrode; and   (g) after the (f), forming a second semiconductor region in a region exposed from the second side wall insulating film in the first semiconductor layer,   wherein a part of the second side wall insulating film is positioned on the first semiconductor layer.

Join the waitlist — get patent alerts

Track US2016087077A1 — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.