Vapor deposition of metal oxides, silicates and phosphates, and silicon dioxide

Abstract

Metal silicates or phosphates are deposited on a heated substrate by the reaction of vapors of alkoxysilanols or alkylphosphates along with reactive metal amides, alkyls or alkoxides. For example, vapors of tris(tert-butoxy)silanol react with vapors of tetrakis(ethylmethylamido)hafnium to deposit hafnium silicate on surfaces heated to 300° C. The product film has a very uniform stoichiometry throughout the reactor. Similarly, vapors of diisopropylphosphate react with vapors of lithium bis(ethyldimethylsilyl)amide to deposit lithium phosphate films on substrates heated to 250° C. Supplying the vapors in alternating pulses produces these same compositions with a very uniform distribution of thickness and excellent step coverage.

What is claimed is: 
     
         1 . A microelectronic device, comprising:
 a substrate having a hole; and   an insulator layer conformally coating the hole,   wherein the insulator layer comprises hafnium oxide.   
     
     
         2 . The device of  claim 1 , wherein the hole has a length to diameter ratio of greater than 40. 
     
     
         3 . The device of  claim 2 , wherein the insulator layer has a root mean square surface roughness less than 0.4 nm. 
     
     
         4 . The device of  claim 1 , wherein the insulator layer has a thickness that varies by less than 1%. 
     
     
         5 . The device of  claim 4 , wherein the hole has a length to diameter ratio of greater than 40. 
     
     
         6 . The device of  claim 1 , wherein the insulator layer forms a portion of a gate insulator. 
     
     
         7 . The device of  claim 1 , wherein the insulator layer forms a portion of a trench capacitor. 
     
     
         8 . The device of  claim 1 , wherein the substrate comprises silicon. 
     
     
         9 . The device of  claim 1 , wherein the hole comprises a trench. 
     
     
         10 . The device of  claim 9 , wherein the insulator layer has a thickness that varies by less than 1%. 
     
     
         11 . The device of  claim 10 , wherein the trench has an aspect ratio of greater than 40. 
     
     
         12 . The device of  claim 9 , wherein the trench has an aspect ratio of greater than 40. 
     
     
         13 . The device of  claim 9 , wherein the insulator layer forms a portion of a gate insulator. 
     
     
         14 . The device of  claim 9 , wherein the insulator layer forms a portion of a capacitor. 
     
     
         15 . The device of  claim 9 , wherein the substrate comprises silicon. 
     
     
         16 . A microelectronic device, comprising:
 a substrate having a hole; and   an insulator layer conformally coating the hole,   wherein the insulator layer comprises zirconium oxide.   
     
     
         17 . The device of  claim 16 , wherein the hole has a length to diameter ratio of greater than 40. 
     
     
         18 . The device of  claim 17 , wherein the insulator layer has a root mean square surface roughness less than 0.4 nm. 
     
     
         19 . The device of  claim 16 , wherein the insulator layer has a thickness that varies by less than 1%. 
     
     
         20 . The device of  claim 19 , wherein the hole has a length to diameter ratio of greater than 40. 
     
     
         21 . The device of  claim 16 , wherein the insulator layer forms a portion of a gate insulator. 
     
     
         22 . The device of  claim 16 , wherein the insulator layer forms a portion of a trench capacitor. 
     
     
         23 . The device of  claim 16 , wherein the substrate comprises silicon. 
     
     
         24 . The device of  claim 16 , wherein the hole comprises a trench. 
     
     
         25 . The device of  claim 24 , wherein the insulator layer has a thickness that varies by less than 1%. 
     
     
         26 . The device of  claim 25 , wherein the trench has an aspect ratio of greater than 40. 
     
     
         27 . The device of  claim 24 , wherein the trench has an aspect ratio of greater than 40. 
     
     
         28 . The device of  claim 24 , wherein the insulator layer forms a portion of a gate insulator. 
     
     
         29 . The device of  claim 24 , wherein the insulator layer forms a portion of a capacitor. 
     
     
         30 . The device of  claim 24 , wherein the substrate comprises silicon.