Preventing epi damage for cap nitride strip scheme in a fin-shaped field effect transistor (finfet) device

Abstract

Approaches for forming an oxide cap to protect a semiconductor device (e.g., a fin field effect transistor device (FinFET)) are provided. Specifically, approaches are provided for forming an oxide cap over a subset (e.g., SiP regions) of raised source drain (RSD) structures on the set of fins of the FinFET device to mitigate damage during subsequent processing. The oxide spacer is deposited before the removal of a nitride capping layer from the FinFET device (e.g., by a hot phosphorus wash). The oxide cap on top of the RSD structures will be preserved throughout the removal of the nitride capping layer to provide hardmask protection during this process.

What is claimed is: 
     
         1 .- 17 . (canceled) 
     
     
         18 . A fin-shaped field effect transistor (FinFET) device, formed via a process, comprising:
 forming a set of fins from a substrate to form a finned substrate;   forming a set of gate structures over the finned substrate, each of the set of gate structures comprising a nitride capping layer;   growing a set of epitaxial phosphorus-doped Si (SiP) regions over a subset of the set of fins;   growing a silicate on the SiP regions;   oxidizing the silicate using a plasma oxidation process to form an oxide cap;   removing the nitride capping layer via a hot phosphorus rinse, wherein the oxide cap prevents damage to the SiP regions from the hot phosphorus rinse; and   removing the oxide cap from the SiP regions.   
     
     
         19 . The FinFET device according to  claim 18 , the process further comprising:
 forming an NFET region from a subset of the set of fins, wherein the SiP regions are grown in the NFET region;   forming a PFET region from a remainder of the set of fins; and   growing a set of epitaxial silicon germanium (SiGe) regions of the RSD in the PFET region, wherein the oxide cap is not formed over the SiGe regions.   
     
     
         20 . The FinFET device according to  claim 19 :
 wherein the silicate is grown on the SiP regions using an epitaxial process; and   wherein the plasma oxidation process includes a thermal oxidation process.   
     
     
         21 . A fin-shaped field effect transistor (FinFET) device, formed via a process, comprising:
 forming a set of fins from a substrate to form a finned substrate;   forming a set of gate structures over the finned substrate, each of the set of gate structures comprising a nitride capping layer;   forming a set of raised source drain (RSD) structures on the finned substrate, wherein a first subset of the RSD structures includes an NFET region and a second subset of the RSD structures includes a PFET region;   forming an oxide cap over only the first subset of the RSD structures; and removing the nitride capping layer.   
     
     
         22 . The FinFET device according to  claim 21 , the process further comprising:
 forming a set of fins from the substrate to form the finned substrate; and   growing a RSD structure of the set on RSD structures on each fin of the set of fins.   
     
     
         23 . The FinFET device according to  claim 22 , the process further comprising:
 forming an NFET region from a subset of the set of fins; and   forming a PFET region from a remainder of the set of fins.   
     
     
         24 . The FinFET device according to  claim 23 , the process further comprising:
 forming a set of phosphorus-doped Si (SiP) regions of the RSD in the NFET region; and   forming a set of silicon germanium (SiGe) regions of the RSD in the PFET region.   
     
     
         25 . A fin-shaped field effect transistor (FinFET) device, comprising:
 a finned substrate, comprising a substrate and a set of fins formed from the substrate;   a set of gate structures over the finned substrate;   a set of raised source drain (RSD) structures, a first subset of the set of RSD structures comprising an NFET region and a second subset of the set of RSD structures comprising a PFET region.   
     
     
         26 . The FinFET device of  claim 25 , wherein one of the RSD structures is formed on each fin of the set of fins. 
     
     
         27 . The FinFET device of  claim 25 , wherein the first subset of the set of RSD structures comprises a set of phosphorous-doped silicon (SiP) regions. 
     
     
         28 . The FinFET device of  claim 27 , wherein the SiP regions comprise epitaxial SiP. 
     
     
         29 . The FinFET device of  claim 25 , wherein the second subset of the set of RSD structures comprises a set of silicon germanium (SiGe) regions. 
     
     
         30 . The FinFET device of  claim 29 , wherein the SiGe regions comprise epitaxial SiGe.