Using a trusted platform module for boot policy and secure firmware

Abstract

Embodiments of apparatuses and methods for using a trusted platform module for boot policy and secure firmware are disclosed. In one embodiment, a trusted platform module includes a non-volatile memory, a port, and a mapping structure. The port is to receive an input/output transaction from a serial bus. The transaction includes a system memory address in the address space of a processor. The mapping structure is to map the system memory address to a first location in non-volatile memory.

What claimed is: 
     
         1 . A trusted platform module comprising:
 non-volatile memory;   a port to receive an input/output transaction from a serial bus, the transaction including a system memory address in the address space of a processor; and   a mapping structure to map the system memory address to a first location in non-volatile memory.   
     
     
         2 . The trusted platform module of  claim 1 , wherein the non-volatile memory is to store basic input/output system code at the first location. 
     
     
         3 . The trusted platform module of  claim 2 , further comprising a command register to direct the input/output transaction to a second location in non-volatile memory instead of the first location. 
     
     
         4 . The trusted platform module of  claim 3 , wherein the non-volatile memory is to store standard basic input/output system code in the first location. 
     
     
         5 . The trusted platform module of  claim 4 , wherein the non-volatile memory is to store recovery basic input/output system code in the second location. 
     
     
         6 . A method comprising:
 receiving, by a trusted platform module, a first input/output transaction from a serial bus, the first input/output transaction including a first system memory address in the address space of a processor; and   mapping, by the trusted platform module, the first system memory address to a first location in non-volatile memory of the trusted platform module.   
     
     
         7 . The method of  claim 6 , further comprising storing basic input/output system code at the first location. 
     
     
         8 . The method of  claim 7 , further comprising configuring a command register in the trusted platform module to direct the first input/output transaction to a second location in the non-volatile memory instead of the first location. 
     
     
         9 . The method of  claim 8 , further comprising storing standard basic input/output system code at the first location. 
     
     
         10 . The method of  claim 9 , further comprising storing recovery basic input/output system code at the second location. 
     
     
         11 . The method of  claim 6 , further comprising configuring a mapping structure in the trusted platform module to map the first system memory address to the first location in the non-volatile memory. 
     
     
         12 . The method of  claim 11 , further comprising:
 issuing, by the processor, a memory transaction to boot a system; and   converting, by a bridge, the memory transaction to the first input/output transaction.   
     
     
         13 . The method of  claim 8 , further comprising issuing, by a processor, a write transaction to configure the command register. 
     
     
         14 . The method of  claim 7 , further comprising storing embedded controller firmware at a third location in the non-volatile memory. 
     
     
         15 . The method of  claim 14 , further comprising:
 issuing, by an embedded controller, a memory transaction including a second system memory address in the address space of the processor;   converting, by a bridge, the memory transaction to a second input/output transaction; and   mapping, by the trusted platform module, the second system memory address to the third location.   
     
     
         16 . A system comprising:
 a processor including
 instruction hardware to fetch a first instruction from a first system memory address in the address space of the processor, and 
 an interface unit to issue a first memory transaction including the first system memory address; and 
   a trusted platform module including:
 non-volatile memory, 
 a port to receive a first input/output transaction from a serial bus, the transaction including the first system memory address, and 
 a mapping structure to map the first system memory address to a first location in non-volatile memory. 
   
     
     
         17 . The system of  claim 16 , further comprising a bridge to convert the first memory transaction to the first input/output transaction. 
     
     
         18 . The system of  claim 16 , wherein the first instruction is the boot the system. 
     
     
         19 . The system of  claim 16 , further comprising an embedded controller to issue a second memory transaction including a second system memory address in the address space of the processor, wherein the mapping structure is also to map the second system memory address to a second location in non-volatile memory. 
     
     
         20 . The system of  claim 19 , wherein the first location is to store basic input/output system code and the second location is to store embedded controller firmware.