US2016079210A1PendingUtilityA1

Semiconductor packages including through electrodes and methods of manufacturing the same

Assignee: SK HYNIX INCPriority: Aug 27, 2012Filed: Nov 25, 2015Published: Mar 17, 2016
Est. expiryAug 27, 2032(~6.1 yrs left)· nominal 20-yr term from priority
H10W 90/734H10W 90/729H10W 90/724H10W 90/26H10W 74/00H10W 72/944H10W 72/834H10W 72/90H10W 72/00H10W 70/657H10W 70/611H10W 70/68H10W 70/65H10W 44/00H10W 20/20H10W 70/682H10W 70/63H10W 74/15H10W 90/00H01L 23/5386H01L 23/481H01L 25/0657
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Claims

Abstract

A semiconductor package includes a substrate and a plurality of semiconductor chips stacked on the substrate. Each of the semiconductor chips has a front surface, a rear surface opposite to the front surface, a sidewall surface connecting the front surface to the rear surface, a vertical through electrode extending from the front surface toward the rear surface with a predetermined depth, and a horizontal through electrode laterally extending from the sidewall surface to be connected to the vertical through electrode. At least one connection member is disposed on the sidewall surfaces of the semiconductor chips to connect the horizontal through electrodes of the semiconductor chips to each other. Related methods are also provided.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A semiconductor package comprising:
 a substrate having a cavity therein;   a plurality of semiconductor chips mounted in the cavity, each of the semiconductor chips having a front surface, a rear surface opposite to the front surface, a sidewall surface connecting the front surface to the rear surface, a vertical through electrode extending from the front surface toward the rear surface with a predetermined depth, and a horizontal through electrode laterally extending from the sidewall surface to be connected to the vertical through electrode; and   at least one connection member disposed on a sidewall of the cavity to connect the horizontal through electrodes of the semiconductor chips to each other.   
     
     
         2 . The semiconductor package of  claim 1 , wherein the number of the semiconductor chips mounted in the cavity is an even or odd number. 
     
     
         3 . The semiconductor package of  claim 1 , wherein a bottommost semiconductor chip is mounted in a flip-chip manner such that the vertical through electrode faces the substrate. 
     
     
         4 . The semiconductor package of  claim 1 , wherein the connection member is an interconnection line formed of a conductive film pattern embedded in the substrate.

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