Semiconductor packages including through electrodes and methods of manufacturing the same
Abstract
A semiconductor package includes a substrate and a plurality of semiconductor chips stacked on the substrate. Each of the semiconductor chips has a front surface, a rear surface opposite to the front surface, a sidewall surface connecting the front surface to the rear surface, a vertical through electrode extending from the front surface toward the rear surface with a predetermined depth, and a horizontal through electrode laterally extending from the sidewall surface to be connected to the vertical through electrode. At least one connection member is disposed on the sidewall surfaces of the semiconductor chips to connect the horizontal through electrodes of the semiconductor chips to each other. Related methods are also provided.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A semiconductor package comprising:
a substrate having a cavity therein; a plurality of semiconductor chips mounted in the cavity, each of the semiconductor chips having a front surface, a rear surface opposite to the front surface, a sidewall surface connecting the front surface to the rear surface, a vertical through electrode extending from the front surface toward the rear surface with a predetermined depth, and a horizontal through electrode laterally extending from the sidewall surface to be connected to the vertical through electrode; and at least one connection member disposed on a sidewall of the cavity to connect the horizontal through electrodes of the semiconductor chips to each other.
2 . The semiconductor package of claim 1 , wherein the number of the semiconductor chips mounted in the cavity is an even or odd number.
3 . The semiconductor package of claim 1 , wherein a bottommost semiconductor chip is mounted in a flip-chip manner such that the vertical through electrode faces the substrate.
4 . The semiconductor package of claim 1 , wherein the connection member is an interconnection line formed of a conductive film pattern embedded in the substrate.Join the waitlist — get patent alerts
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