US2016079160A1PendingUtilityA1

Semiconductor device

Assignee: RENESAS ELECTRONICS CORPPriority: May 27, 2013Filed: Nov 24, 2015Published: Mar 17, 2016
Est. expiryMay 27, 2033(~6.8 yrs left)· nominal 20-yr term from priority
H10W 20/0698H10W 20/083H10W 20/496H10D 64/035H10D 64/017H10D 30/696H10D 30/685H10D 30/0413H10D 30/69H01L 27/1157H01L 21/76895H01L 21/76805H01L 23/5223H01L 29/66545H10B 41/30H10B 43/35
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Claims

Abstract

The performances of a semiconductor device are improved. A semiconductor device has a first electrode and a dummy electrode formed apart from each other over a semiconductor substrate, a second electrode formed between the first electrode and the dummy electrode, at the circumferential side surface of the first electrode, and at the circumferential side surface of the dummy electrode, and a capacitive insulation film formed between the first electrode and the second electrode. The first electrode, the second electrode, and the capacitive insulation film form a capacitive element. Further, the semiconductor device has a first plug penetrating through the interlayer insulation film, and electrically coupled with the first electrode, and a second plug penetrating through the interlayer insulation film, and electrically coupled with the portion of the second electrode formed at the side surface of the dummy electrode opposite to the first electrode side.

Claims

exact text as granted — not AI-modified
1 - 20 . (canceled) 
     
     
         21 . A method for manufacturing a semiconductor device, including the steps of:
 (a) forming a first conductive film over a semiconductor substrate,   (b) patterning the first conductive film, and forming a first electrode formed of the first conductive film, and forming a first dummy electrode formed of the first conductive film apart from the first electrode,   (c) forming a first insulation film over the semiconductor substrate including the surface of the first electrode and the surface of the first dummy electrode,   (d) forming a second conductive film over the first insulation film,   (e) etching back the second conductive film, and leaving the second conductive film between the first electrode and the first dummy electrode, at the circumferential side surface of the first electrode, and at the circumferential side surface of the first dummy electrode via the first insulation film, thereby to form a second electrode,   (f) removing a portion of the first insulation film not covered with the second electrode, and forming a first capacitive insulation film formed of the first insulation film between the first electrode and the second electrode,   (g) forming an interlayer insulation film in such a manner as to cover the first electrode, the second electrode, and the first capacitive insulation film,   (h) forming a first coupling hole penetrating through the interlayer insulation film, and reaching the first electrode, and a second coupling hole penetrating through the interlayer insulation film, and reaching a first portion of the second electrode formed at a side surface of the first dummy electrode opposite to the first electrode side, and   (i) forming a first coupling electrode formed of a third conductive film embedded in the first coupling hole, and electrically coupled with the first electrode, and forming a second coupling electrode formed of the third conductive film embedded in the second coupling hole, and electrically coupled with the first portion of the second electrode,   wherein in the step (f), the first electrode, the second electrode, and the first capacitive insulation film form a first capacitive element.   
     
     
         22 . The method for manufacturing a semiconductor device according to  claim 21 ,
 wherein in the step (e), the second conductive film is patterned and etched back, and thereby the second conductive film is left between the first electrode and the first dummy electrode, at the circumferential side surface of the first electrode, at the circumferential side surface of the first dummy electrode, and in a partial region of the top surface of the first electrode via the first insulation film, thereby to form the second electrode.   
     
     
         23 . The method for manufacturing a semiconductor device according to  claim 21 , including:
 a step (j) of, after the step (f) and before the step (g), forming a first metal silicide film at the surface of the first conductive film, and forming a second metal silicide film at the surface of the second conductive film,   wherein, in the step (i), the first coupling electrode in contact with the first metal silicide film is formed, and the second coupling electrode in contact with the second metal silicide film is formed.   
     
     
         24 . The method for manufacturing a semiconductor device according to  claim 21 , including:
 a step (k) of, before the step (a), forming a second insulation film at the first main surface of the semiconductor substrate in a first region on the first main surface side of the semiconductor substrate, and in a second region on the first main surface side of the semiconductor substrate,   wherein, in the step (a), the first conductive film is formed over the second insulation film in the first region and the second region,   wherein, in the step (b), the first conductive film and the second insulation film are patterned in the first region and the second region, and the first electrode and the first dummy electrode are formed in the first region, and a first gate electrode formed of the first conductive film, and a first gate insulation film formed of the second insulation film between the first gate electrode and the semiconductor substrate are formed in the second region,   wherein, in the step (c), the first insulation film is formed over the semiconductor substrate including the surface of the first electrode, the surface of the first dummy electrode, and the surface of the first gate electrode in the first region and the second region,   wherein, in the step (d), the second conductive film is formed over the first insulation film in the first region and the second region,   wherein, in the step (e), the second conductive film is etched back in the first region and the second region, thereby to form the second electrode in the first region, and the second conductive film is left at the side surface of the first gate electrode via the first insulation film, thereby to form a second gate electrode in the second region, and   wherein, in the step (f), a portion of the first insulation film not covered with any of the second electrode and the second gate electrode is removed in the first region and the second region, the first capacitive insulation film is formed in the first region, and a second gate insulation film formed of the first insulation film between the first gate electrode and the second gate electrode, and the first insulation film between the second gate electrode and the semiconductor substrate is formed in the second region,   the method including:   a step (l) of, after the step (f) and before the step (g), forming a source region and a drain region in alignment with the first gate electrode and the second gate electrode in the semiconductor substrate in the second region,   wherein, in the step (g), the interlayer insulation film is formed in such a manner as to cover the first electrode, the second electrode, the first capacitive insulation film, the first gate electrode, the second gate electrode, the second gate insulation film, the source region, and the drain region in the first region and the second region,   wherein, in the step (h), the first coupling hole and the second coupling hole are formed in the first region, and a third coupling hole penetrating through the interlayer insulation film, and reaching the source region, and a fourth coupling hole penetrating through the interlayer insulation film, and reaching the drain region are formed in the second region,   wherein, in the step (i), the first coupling electrode and the second coupling electrode are formed in the first region, and a third coupling electrode formed of the third conductive film embedded in the third coupling hole, and electrically coupled with the source region is formed, and a fourth coupling electrode formed of the third conductive film embedded in the fourth coupling hole, and electrically coupled with the drain region are formed in the second region, and   wherein, in the step (l), the first gate insulation film, the first gate electrode, the second gate electrode, and the second gate insulation film form a memory cell.   
     
     
         25 . The method for manufacturing a semiconductor device according to  claim 21 , including:
 a step (m) of, before the step (a), forming an element isolation region in the semiconductor substrate,   wherein, in the step (a), the first conductive film is formed over the element isolation region.   
     
     
         26 . A method for manufacturing a semiconductor device, including the steps of:
 (a) forming a first conductive film over a semiconductor substrate,   (b) patterning the first conductive film, and forming a first electrode formed of the first conductive film, and a first opening penetrating through the first electrode,   (c) forming a first insulation film over the semiconductor substrate including the inside of the first opening, and the surface of the first electrode,   (d) forming a second conductive film over the first insulation film,   (e) etching back the second conductive film, and leaving the second conductive film in the inside of the first opening, and at the circumferential side surface of the first electrode, via the first insulation film, thereby to form a second electrode,   (f) removing a portion of the first insulation film not covered with the second electrode, and forming a first capacitive insulation film formed of the first insulation film between the first electrode and the second electrode,   (g) forming an interlayer insulation film in such a manner as to cover the first electrode, the second electrode, and the first capacitive insulation film,   (h) forming a first coupling hole penetrating through the interlayer insulation film, and reaching the first electrode, and a second coupling hole penetrating through the interlayer insulation film, and reaching the second electrode, and   (i) forming a first coupling electrode formed of a third conductive film embedded in the first coupling hole, and electrically coupled with the first electrode, and forming a second coupling electrode formed of the third conductive film embedded in the second coupling hole, and electrically coupled with the second electrode,   wherein, in the step (f), the first electrode, the second electrode, and the first capacitive insulation film form a first capacitive element.   
     
     
         27 . A method for manufacturing a semiconductor device, including the steps of:
 (a) forming a first conductive film over a semiconductor substrate,   (b) patterning the first conductive film, and forming a first electrode formed of the first conductive film,   (c) forming a first insulation film over the first semiconductor substrate including the surface of the first electrode,   (d) forming a second conductive film over the first insulation film,   (e) etching back the second conductive film, an leaving the second conductive film at the circumferential side surface of the first electrode via the first insulation film, thereby to form a second electrode,   (f) removing a portion of the first insulation film not covered with the second electrode, and forming a first capacitive insulation film formed of the first insulation film between the first electrode and the second electrode,   (g) forming an interlayer insulation film in such a manner as to cover the first electrode, the second electrode, and the first capacitive insulation film,   (h) forming a first coupling hole penetrating through the interlayer insulation film, and reaching the first electrode, and a second coupling hole penetrating through the interlayer insulation film, and reaching the second electrode, and   (i) forming a first coupling electrode formed of a third conductive film embedded in the first coupling hole, and electrically coupled with the first electrode, and forming a second coupling electrode formed of the third conductive film embedded in the second coupling hole, and electrically coupled with the second electrode,   wherein, in the step (f), the first electrode, the second electrode, and the first capacitive insulation film form a first capacitive element, and   wherein, in the step (b), the first electrode including a plurality of first line parts respectively extending in a first direction, and arrayed in a second direction crossing with the first direction in plan view is formed of the first conductive film.

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