US2016071571A1PendingUtilityA1

Semiconductor memory device, method of controlling read preamble signal thereof, and data transmission system

Assignee: PS4 LUXCO SARLPriority: Jan 20, 2009Filed: Nov 13, 2015Published: Mar 10, 2016
Est. expiryJan 20, 2029(~2.5 yrs left)· nominal 20-yr term from priority
Inventors:Atsuo Koshizuka
G11C 15/00G11C 8/18G11C 7/222G11C 15/04G11C 7/22G11C 11/409G11C 7/1066G11C 11/4096G11C 11/4076G11C 7/1072G11C 7/1051
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Claims

Abstract

A system, includes a controller comprising a plurality of first external terminals configured to supply a command and an address, and communicate a data, and communicate a strobe signal related to the data; and a semiconductor memory device including a plurality of second external terminals corresponding to the plurality of first external terminals, at least one of the plurality of first external terminals and at least one of the plurality of second external terminals each being capable of supplying an information specifying a length of a preamble of the strobe signal before the semiconductor memory device communicates the data between the controller and the semiconductor memory device, the semiconductor memory device further including a preamble register configured to be capable of storing the information.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A method for accessing a semiconductor memory device comprising:
 providing a system clock to a system clock input terminal of the memory device;   providing desired preamble length information to address input terminals of the memory device, wherein the desired preamble length information is a selected one of a plurality of possible preamble lengths;   providing a read command to command input terminals of the memory device;   receiving a preamble having a duration specified by the desired preamble length information from a bidirectional data strobe terminal of the memory device; and   receiving read data from bidirectional data terminals of the memory device in synchronization with a read toggle signal received from the bidirectional data strobe terminal of the memory device.

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