Semiconductor device
Abstract
According to one embodiment, a semiconductor device includes a first semiconductor region, a second semiconductor region, a third semiconductor region, a fourth semiconductor region, a first gate electrode, a first region, and a second region. The third semiconductor region is provided on the second semiconductor region. The fourth semiconductor region is provided on the third semiconductor region. The first region is provided in the second semiconductor region. The first region is positioned between the first semiconductor region and the third semiconductor region. The second region is provided in the second semiconductor region. The second region is positioned between the first region and the gate electrode. A carrier density of the first conductivity type in the second region is higher than a carrier density of the first conductivity type in the first region.
Claims
exact text as granted — not AI-modified1 . A semiconductor device comprising:
a first semiconductor region of a second conductivity type; a second semiconductor region of a first conductivity type provided on the first semiconductor region; a third semiconductor region of the second conductivity type provided on the second semiconductor region; a fourth semiconductor region of the first conductivity type provided on the third semiconductor region; a first gate electrode provided in the second semiconductor region, the third semiconductor region, and the fourth semiconductor region via a first insulating film; a first region provided in the second semiconductor region and positioned between the first semiconductor region and the third semiconductor region; and a second region provided in the second semiconductor region and positioned between the first region and the gate electrode, a carrier density of the first conductivity type in the second region is higher than a carrier density of the first conductivity type in the first region, the second region contacting the first insulating film.
2 . The device according to claim 1 , further comprising:
a fourth region provided in the third semiconductor region and positioned between the first region and the fourth semiconductor region; and a third region provided in the third semiconductor region and positioned between the fourth region and the first gate electrode, a distance between a first interface and the first semiconductor region being smaller than a distance between the second interface and the first semiconductor region, the first interface being a part of an interface between the second semiconductor region and the third semiconductor region and being positioned between the first region and the fourth region, and the second interface being a part of the interface between the second semiconductor region and the third semiconductor region and being positioned between the second region and the third region.
3 . The device according to claim 2 , wherein
a carrier density of the second conductivity type in the fourth region is higher than a carrier density of the second conductivity type in the third region.
4 . The device according to claim 1 , further comprising:
an electrode provided in the second semiconductor region, the third semiconductor region, and the fourth semiconductor region via a second insulating film; the first region being adjacent to the second insulating film; and the second region being more distant from the second insulating film than the second region.
5 . The device according to claim 1 , further comprising:
a second gate electrode provided in the second semiconductor region, the third semiconductor region, and the fourth semiconductor region via the second insulating film; and a fifth region provided in the second semiconductor region and positioned between the first region and the second gate electrode, a carrier density of the first conductivity type in the fifth region being higher than a carrier density of the first conductivity type in the first region.
6 . The device according to claim 5 , further comprising:
a fourth region provided in the third semiconductor region and positioned between the first region and the fourth semiconductor region; and a third region provided in the third semiconductor region and positioned between the fourth region and the first gate electrode, a distance between a first interface and the first semiconductor region being smaller than a distance between the second interface and the first semiconductor region, the first interface being a part of an interface between the second semiconductor region and the third semiconductor region and being positioned between the first region and the fourth region, and the second interface being a part of the interface between the second semiconductor region and the third semiconductor region and being positioned between the second region and the third region.
7 . The device according to claim 6 , further comprising:
a fifth region provided in the second semiconductor region and positioned between the first region and the second gate electrode; a sixth region provided in the third semiconductor region and positioned between the fourth region and the second gate electrode; a distance between a third interface and the first semiconductor region is larger than a distance between the first interface and the first semiconductor region; and the third interface being a part of the interface between the second semiconductor region and the third semiconductor region and being positioned between the fifth region and the sixth region.
8 . The device according to claim 7 , wherein
a carrier density of the second conductivity type in the fourth region is higher than a carrier density of the second conductivity type in the third region and a carrier density of the second conductivity type in the sixth region.
9 . The device according to claim 2 , wherein
a position of a portion of the second region in a first direction is equal to a position of a portion of the fourth region in the first direction, and the first direction is from the first semiconductor region toward the second semiconductor region.
10 . The device according to claim 1 , further comprising:
a fifth semiconductor region of the second conductivity type selectively provided on the third semiconductor region.
11 . The device according to claim 10 , wherein
a carrier density of the second conductivity type in the fifth semiconductor region is higher than a carrier density of the second conductivity type in the third semiconductor region.
12 . The device according to claim 11 , wherein
the second region is not provided in at least a portion of a region of the second semiconductor region, the region of the second semiconductor region is arranged with the fifth semiconductor region in a first direction from the first semiconductor region toward the second semiconductor region.
13 . The device according to claim 1 , wherein
a carrier density of the first conductivity type in the fourth semiconductor region is higher than a carrier density of the second conductivity type in the third semiconductor region.
14 . The device according to claim 1 , further comprising:
a seventh region provided on a side of the first semiconductor region in the second semiconductor region, a carrier density of the first conductivity type in the seventh region being lower than a carrier density of the first conductivity type in the first region and a carrier density of the second conductivity type in the second region.Join the waitlist — get patent alerts
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