Electronic device

Abstract

An electronic device includes a transistor. The transistor includes a body including a metal oxide; a gate electrode; and a gate insulating layer interposed between the body and the gate electrode, wherein the transistor is turned on or turned off by movement of oxygen vacancies in the body according to voltages applied to the gate electrode and the body.

What is claimed is: 
     
         1 . An electronic device comprising a transistor, the transistor comprising:
 a body including a metal oxide;   a gate electrode; and   a gate insulating layer interposed between the body and the gate electrode,   wherein the transistor is turned on or turned off by movement of oxygen vacancies in the body according to voltages applied to the gate electrode and the body.   
     
     
         2 . The electronic device according to  claim 1 , wherein turning the transistor on includes moving the oxygen vacancies toward the gate electrode in the body, and
 wherein turning the transistor off includes moving the oxygen vacancies away from the gate electrode in the body.   
     
     
         3 . The electronic device according to  claim 2 , wherein oxygen ions in the body move in an opposite direction to the oxygen vacancies. 
     
     
         4 . The electronic device according to  claim 1 , wherein, when the voltage applied to the gate electrode, the body, or both is removed, the transistor maintains an on state or an off state present just before the removal of the voltage. 
     
     
         5 . The electronic device according to  claim 1 , wherein the body, the gate insulating layer and the gate electrode are sequentially stacked over a substrate in a direction perpendicular to a surface of the substrate. 
     
     
         6 . The electronic device according to  claim 5 , wherein the transistor further comprises:
 a first junction region and a second junction region which are formed in the body at both sides of the gate electrode, respectively, and   wherein a width of a region between the first junction region and the second junction region is less than or equal to a width of the gate electrode in a same direction.   
     
     
         7 . The electronic device according to  claim 6 , wherein, when the transistor is turned on, a conductive channel is formed by the oxygen vacancies between the first junction region and the second junction region. 
     
     
         8 . The electronic device according to  claim 5 , wherein the transistor further comprises:
 a first junction region and a second junction region which are formed in the body at both sides of the gate electrode, respectively;   a line coupled to the first junction region through a first contact; and   a memory element coupled to the second junction region through a second contact.   
     
     
         9 . The electronic device according to  claim 1 , wherein the body has a pillar shape which extends in a direction perpendicular to a surface of a substrate, and the gate electrode is in contact with a first side of the body with the gate insulating layer therebetween, and
 the transistor further comprising:   a conductive pattern which is in direct contact with a second side of the body.   
     
     
         10 . The electronic device according to  claim 9 , wherein the conductive pattern supplies a body voltage to the body. 
     
     
         11 . The electronic device according to  claim 9 , wherein each of the gate electrode and the conductive pattern has a line shape which extends in a first direction parallel to the surface of the substrate. 
     
     
         12 . The electronic device according to  claim 9 , wherein a top surface of the gate electrode is located at a same level as or above a top surface of the body, and
 a bottom surface of the gate electrode is located at a same level as or below a bottom surface of the body.   
     
     
         13 . The electronic device according to  claim 9 , wherein a top surface of the conductive pattern is located at a same level as or below a top surface of the body, and
 a bottom surface of the conductive pattern is located at a same level as or above a bottom surface of the body.   
     
     
         14 . The electronic device according to  claim 9 , wherein the transistor further comprises:
 a first contact coupled to a bottom surface of the body;   a second contact coupled to a top surface of the body;   a line coupled to the first contact under the first contact; and   a memory element coupled to the second contact over the second contact.   
     
     
         15 . The electronic device according to  claim 1 , further comprising a microprocessor which includes:
 a control unit configured to receive a signal including a command from an outside of the microprocessor, and performs extracting, decoding of the command, or controlling input or output of a signal of the microprocessor;   an operation unit configured to perform an operation based on a result that the control unit decodes the command; and   a memory unit configured to store data for performing the operation, data corresponding to a result of performing the operation, or an address of data for which the operation is performed,   wherein the transistor is part of at least one of the control unit, the operation unit and the memory unit in the microprocessor.   
     
     
         16 . The electronic device according to  claim 1 , further comprising a processor which includes:
 a core unit configured to perform, based on a command inputted from an outside of the processor, an operation corresponding to the command, by using data;   a cache memory unit configured to store data for performing the operation, data corresponding to a result of performing the operation, or an address of data for which the operation is performed; and   a bus interface connected between the core unit and the cache memory unit, and configured to transmit data between the core unit and the cache memory unit,   wherein the transistor is part of at least one of the core unit, the cache memory unit and the bus interface in the processor.   
     
     
         17 . The electronic device according to  claim 1 , further comprising a processing system which includes:
 a processor configured to decode a command received by the processor and control an operation for information based on a result of decoding the command;   an auxiliary memory device configured to store a program for decoding the command and the information;   a main memory device configured to call and store the program and the information from the auxiliary memory device such that the processor can perform the operation using the program and the information when executing the program; and   an interface device configured to perform communication between at least one of the processor, the auxiliary memory device and the main memory device and the outside,   wherein the transistor is part of at least one of the processor, the auxiliary memory device, the main memory device and the interface device in the processing system.   
     
     
         18 . The electronic device according to  claim 1 , further comprising a data storage system which includes:
 a storage device configured to store data and conserve stored data regardless of power supply;   a controller configured to control input and output of data to and from the storage device according to a command inputted form an outside;   a temporary storage device configured to temporarily store data exchanged between the storage device and the outside; and   an interface configured to perform communication between at least one of the storage device, the controller and the temporary storage device and the outside,   wherein the transistor is part of at least one of the controller, the storage device, the temporary storage device and the interface in the data storage system.   
     
     
         19 . The electronic device according to  claim 1 , further comprising a memory system which includes:
 a memory configured to store data and conserve stored data regardless of power supply;   a memory controller configured to control input and output of data to and from the memory according to a command inputted form an outside;   a buffer memory configured to buffer data exchanged between the memory and the outside; and   an interface configured to perform communication between at least one of the memory, the memory controller and the buffer memory and the outside,   wherein the transistor is part of at least one of the memory controller, the memory, the buffer memory ands the interface in the memory system.