US2016056229A1PendingUtilityA1

Method of fabricating semiconductor device

Assignee: SK HYNIX INCPriority: Jul 13, 2012Filed: Nov 5, 2015Published: Feb 25, 2016
Est. expiryJul 13, 2032(~5.9 yrs left)· nominal 20-yr term from priority
H10W 20/43H10D 1/716H10D 1/696H10D 1/043H10D 1/042H10B 99/00H10B 12/053H10D 1/692H01L 28/75H01L 23/528
30
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Claims

Abstract

The method includes forming a metal interconnection layer and a first interlayer insulating layer on a semiconductor substrate, forming a reservoir capacitor region by etching the first interlayer insulating layer to expose the metal interconnection layer, forming a barrier metal layer on the reservoir capacitor region, forming a sacrificial insulating layer on the barrier metal layer in a lower portion of the reservoir capacitor region, performing a pre-cleaning process to remove the barrier metal layer on a sidewall of the reservoir capacitor region, and removing the sacrificial insulating layer.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A semiconductor device comprising:
 a metal interconnection layer provided over a substrate;   an lower electrode of a reservoir capacitor provided over the metal interconnection layer; and   a barrier metal pattern provided between the metal interconnection layer and the lower electrode,   wherein the lower electrode is isolated from the metal interconnection, and   wherein the barrier metal pattern is configured to couple the lower reservoir capacitor to the metal interconnection.   
     
     
         2 . The method of  claim 1 , wherein the barrier metal pattern extends up to a level higher than an upper surface of the metal interconnection layer. 
     
     
         3 . The semiconductor device of  claim 1 ,
 wherein the lower electrode of the reservoir capacitor is provided in a peripheral region of the semiconductor substrate.

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