US2016056070A1PendingUtilityA1

Semiconductor device and method of manufacturing the same

Assignee: RENESAS ELECTRONICS CORPPriority: Oct 21, 2013Filed: Nov 3, 2015Published: Feb 25, 2016
Est. expiryOct 21, 2033(~7.2 yrs left)· nominal 20-yr term from priority
H10W 20/085H10W 70/635H10W 20/089H10W 20/082H10W 20/076H10W 20/056H10W 20/081H01L 21/76802H01L 21/76877H01L 21/76831
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Claims

Abstract

Both enhancement of embeddability of a wiring groove and suppression of the generation of a coupling failure between a wiring and a coupling member are simultaneously achieved. In a cross-section perpendicular to a direction passing through the contact and a direction in which the second wiring extends, the center of the contact is more close to a first side surface of the second wiring than the center of the second wiring. In addition, when a region where the first side surface of the second wiring overlaps the contact in the direction in which the second wiring extends, is set to be an overlapping region, at least the lower part of the overlapping region has an inclination steeper than that of other portions of the side surface of the second wiring.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A method of manufacturing a semiconductor device, comprising the steps of:
 forming a first interlayer insulating film over a first wiring;   forming a coupling hole located over the first wiring in the first interlayer insulating film;   embedding a coupling member formed of an electrically conductive material in the coupling hole;   forming a second interlayer insulating film over the coupling member and over the first interlayer insulating film;   forming an opening located over the coupling member in the second interlayer insulating film;   embedding a filling member within the opening;   forming a mask pattern having a linear opening pattern over the second interlayer insulating film;   forming a wiring groove by etching the second interlayer insulating film by using the mask pattern as a mask and removing the filling member; and   embedding a second wiring in the wiring groove,   wherein in the step of forming the opening pattern:
 the opening pattern is caused to overlap at least a part of the filling member in a planar view; and 
 in a cross-section perpendicular to a direction passing through the coupling member and a direction in which the opening pattern extends, a center of the coupling member is caused to be located more close to a first side surface of the opening pattern than a center of the opening pattern. 
   
     
     
         2 . The method of manufacturing a semiconductor device according to  claim 1 ,
 wherein the filling member is a resist.   
     
     
         3 . The method of manufacturing a semiconductor device according to  claim 1 ,
 wherein a reticle used in the step of forming the coupling hole in the first interlayer insulating film is identical to a reticle used in the step of forming the opening in the second interlayer insulating film.

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