Bipolar junction transistors with reduced epitaxial base facets effect for low parasitic collector-base capacitance

Abstract

Fabrication methods, device structures, and design structures for a bipolar junction transistor. A dielectric structure is formed that is coextensive with a single crystal semiconductor material of a substrate in an active device region. A semiconductor layer is formed that includes a single crystal section coupled with the active device region. The semiconductor layer has an edge that overlaps with a top surface of the dielectric structure. An intrinsic base layer is formed on the semiconductor layer.

What is claimed is: 
     
         1 . A device structure for a bipolar junction transistor formed using a substrate comprised of single crystal semiconductor material, the device structure comprising:
 an active device region in the substrate, the active device region comprised of the single crystal semiconductor material;   a dielectric structure positioned coextensive with the active device region;   a semiconductor layer including a single crystal section coupled with the active device region, the single crystal section having an edge that overlaps with a top surface of the dielectric structure; and   an intrinsic base layer on the semiconductor layer.   
     
     
         2 . The device structure of  claim 1  wherein the intrinsic base layer is coterminous with the semiconductor layer. 
     
     
         3 . The device structure of  claim 1  wherein the intrinsic base layer includes a single crystal section coextensive with the single crystal section of the semiconductor layer and a facet coterminous with the edge of the single crystal section. 
     
     
         4 . The device structure of  claim 1  further comprising:
 a collector in the active device region; and 
 an emitter coupled by the intrinsic base layer with the collector. 
 
     
     
         5 . The device structure of  claim 1  wherein the dielectric structure is a trench isolation region in the substrate, the trench isolation region defines a boundary of the active device region, and the single crystal section of the semiconductor layer extends laterally beyond the boundary. 
     
     
         6 . The device structure of  claim 1  wherein the single crystal semiconductor material of the substrate in the active device region has a crystal structure and the single crystal section of the semiconductor layer has a crystal structure aligned with the crystal structure of the single crystal semiconductor material of the substrate in the active device region. 
     
     
         7 . The device structure of  claim 1  wherein the semiconductor layer includes a non-single crystal section on the top surface of the dielectric structure, and the edge is disposed at a transition from the single crystal section to the non-single crystal section. 
     
     
         8 . The device structure of  claim 1  wherein the dielectric structure is a dielectric layer on a top surface of the active device region, the dielectric layer includes an opening that extends vertically to the active device region, and further comprising:
 a plug of a semiconductor material in the opening, the plug having an epitaxial relationship with the single crystal semiconductor material of the active device region. 
 
     
     
         9 . The device structure of  claim 8  further comprising:
 a trench isolation region in the substrate, the trench isolation region having a atop surface and defining a boundary in the substrate for the active device region, and the dielectric layer extending across the top surface of the trench isolation region.