Semiconductor device

Abstract

A semiconductor device includes a substrate which includes a first face. The device also includes a buffer layer, a semiconductor layer, source and drain electrodes, and a gate electrode. A trench is formed on the semiconductor layer so that the trench surrounds the source electrode, the drain electrode, and the gate electrode in a plan view, the trench passes through the semiconductor layer and the buffer layer, and a bottom of the trench reaches at least an inside of the substrate. A distance from the first face of the substrate to the bottom of the trench is 100 nm or more in a thickness direction of the substrate.

What is claimed is: 
     
         1 . A semiconductor device comprising:
 a substrate which includes a first face and a second face facing the first face and in which at least the first face comprises silicon;   a buffer layer which comprises a first group III nitride semiconductor and includes a third face and a fourth face facing the third face and in which the third face faces the first face of the substrate;   a semiconductor layer which comprises a second group III nitride semiconductor and includes a fifth face and a sixth face facing the fifth face and in which the fifth face faces the first face of the substrate via the buffer layer;   a source electrode formed over the sixth face of the semiconductor layer;   a drain electrode formed over the sixth face of the semiconductor layer;   a gate electrode formed over the sixth face of the semiconductor layer and which is formed between the source electrode and the drain electrode in a plan view;   wherein a trench is formed on the sixth face of the semiconductor layer so that the trench surrounds the source electrode, the drain electrode, and the gate electrode in a plan view, the trench passes through the semiconductor layer and the buffer layer, and a bottom of the trench reaches at least an inside of the substrate, and the semiconductor device further comprises:   a metal film which is formed in the trench and which is formed at least from the substrate to the buffer layer in a height direction of the trench, the metal film and the gate electrode comprising the same layer; and   a gate insulating film formed on the sixth face of the semiconductor layer, the gate electrode being formed on an upper surface of the gate insulating film, and an upper surface of the metal film being substantially coplanar with the upper surface of the gate insulating film,   wherein a distance from the first face of the substrate to the bottom of the trench is 100 nm or more in a thickness direction of the substrate.   
     
     
         2 . The semiconductor device according to  claim 1 ,
 wherein the gate insulating film extends to a side surface of the trench.   
     
     
         3 . The semiconductor device according to  claim 2 , wherein the gate insulating film is continuously formed from the sixth face of the semiconductor layer to the side surface of the trench. 
     
     
         4 . The semiconductor device according to  claim 1 , further comprising:
 an interlayer insulating film buried in the trench.   
     
     
         5 . The semiconductor device according to  claim 2 , wherein the metal film is formed along a sidewall of the gate insulating film to a height which is greater than a height of the sixth face of the semiconductor layer. 
     
     
         6 . The semiconductor device according to  claim 1 , wherein the metal film inhibits water from entering an interface between the first face of the substrate and the third face of the buffer layer. 
     
     
         7 . The semiconductor device according to  claim 1 , wherein a thickness of the substrate is 200 μm or less. 
     
     
         8 . The semiconductor device according to  claim 1 , wherein the trench defines a dicing line and alleviates stress applied to the substrate by the semiconductor layer due to a lattice mismatch. 
     
     
         9 . The semiconductor device according to  claim 1 , wherein the first group III nitride semiconductor of the buffer layer is selected from the group consisting of aluminum nitride (AlN), aluminum gallium nitride (AlGaN), and gallium nitride (GaN). 
     
     
         10 . The semiconductor device according to  claim 1 , wherein the semiconductor layer comprises doped gallium nitride (GaN). 
     
     
         11 . The semiconductor device according to  claim 1 , wherein a sum of a thickness of the semiconductor layer and a thickness of the buffer layer is 4 μm or more. 
     
     
         12 . The semiconductor device according to  claim 1 ,
 wherein the trench comprises a plurality of trenches, and   wherein the semiconductor device comprises a metal oxide semiconductor field effect transistor (MOSFET), and a channel of the MOSFET is formed in the semiconductor layer between a first trench of the plurality of trenches and a second trench of the plurality of trenches.   
     
     
         13 . The semiconductor device according to  claim 12 , wherein the MOSFET further comprises the gate insulating film formed on the sixth face of the semiconductor layer and on the channel region. 
     
     
         14 . The semiconductor device according to  claim 13 , wherein the MOSFET further comprises the gate electrode formed on the gate insulating film between the first and second trenches. 
     
     
         15 . The semiconductor device according to  claim 14 , wherein the MOSFET further comprises source and drain regions formed in the sixth face of the semiconductor layer between the first and second trenches, and coupled to the source electrode and the drain electrode respectively. 
     
     
         16 . The semiconductor device according to  claim 15 , wherein a sidewall of the source region forms a sidewall of the first trench and a sidewall of the drain region forms a sidewall of the second trench. 
     
     
         17 . The semiconductor device according to  claim 1 , wherein a width of the trench is 100 nm or more and 2 μm or less, and the width of the trench is gradually reduced from the semiconductor layer toward the substrate. 
     
     
         18 . A semiconductor device comprising:
 a substrate which includes a first face and a second face facing the first face and in which at least the first face comprises silicon;   a buffer layer which comprises a first group III nitride semiconductor and includes a third face and a fourth face facing the third face and in which the third face faces the first face of the substrate;   a semiconductor layer which comprises a second group III nitride semiconductor and includes a fifth face and a sixth face facing the fifth face and in which the fifth face faces the first face of the substrate via the buffer layer;   a gate electrode formed on the sixth face of the semiconductor layer;   a trench formed on the sixth face of the semiconductor layer so that the trench passes through the semiconductor layer and the buffer layer, and a bottom of the trench reaches at least an inside of the substrate, such that a distance from the first face of the substrate to the bottom of the trench is 100 nm or more in a thickness direction of the substrate;   a metal film which is formed in the trench and which is formed at least from the substrate to the buffer layer in a height direction of the trench, the metal film and the gate electrode comprising the same layer; and   a gate insulating film formed on the sixth face of the semiconductor layer, the gate electrode being formed on an upper surface of the gate insulating film, and an upper surface of the metal film being substantially coplanar with the upper surface of the gate insulating film.   
     
     
         19 . A semiconductor device comprising:
 a substrate which includes a first face and a second face facing the first face and in which at least the first face comprises silicon, a thickness of the substrate being 200 μm or less;   a buffer layer which comprises a first group III nitride semiconductor and includes a third face and a fourth face facing the third face and in which the third face faces the first face of the substrate, the first group III nitride semiconductor of the buffer layer being selected from the group consisting of aluminum nitride (AlN), aluminum gallium nitride (AlGaN), and gallium nitride (GaN);   a semiconductor layer which comprises a second group III nitride semiconductor and includes a fifth face and a sixth face facing the fifth face and in which the fifth face faces the first face of the substrate via the buffer layer, wherein the semiconductor layer comprises doped gallium nitride (GaN), and a sum of a thickness of the semiconductor layer and a thickness of the buffer layer is 4 μm or more;   first and second trenches formed on the sixth face of the semiconductor layer for alleviating stress applied to the substrate by the semiconductor layer due to a lattice mismatch, the first and second trenches passing through the semiconductor layer and the buffer layer, and a bottom of the trenches reaching at least an inside of the substrate such that a distance from the first face of the substrate to the bottom of the trench is 100 nm or more in a thickness direction of the substrate, and a width of a trench of the first and second trenches is 100 nm or more and 2 μm or less, and the width of the trench is gradually reduced from the semiconductor layer toward the substrate;   a channel region formed in the semiconductor layer between the first and second trenches;   a gate insulating film formed on the sixth face of the semiconductor layer on the channel region, and between the first and second trenches in a plan view;   a gate electrode formed on the gate insulating film between the first and second trenches in a plan view;   source and drain regions formed in the sixth face of the semiconductor layer between the first and second trenches, and coupled to the source electrode and the drain electrode respectively, a sidewall of the source region forms a sidewall of the first trench and a sidewall of the drain region forms a sidewall of the second trench; and   a metal film which is formed inside the insulating film in the first and second trenches and which is formed at least from the substrate to the buffer layer in a height direction of the first and second trenches, the metal film inhibiting water from entering an interface between the first face of the substrate and the third face of the buffer layer, the metal film and the gate electrode comprising the same layer,   wherein the gate electrode is formed on an upper surface of the gate insulating film, and an upper surface of the metal film is substantially coplanar with the upper surface of the gate insulating film.