Level shift circuit and drive circuit of display device
Abstract
A display driver includes an input node for receiving display data, a level shift circuit configured to convert voltage level of the display data and output a first voltage and a second voltage based on the display data, an output node for outputting the output display data, a first P-channel MOS transistor coupled to the output node, whose gate is configured to input the first voltage, and a first N-channel MOS transistor coupled to the output node, whose gate is configured to input the second voltage, wherein a voltage difference between the second voltage and the first voltage varies based on the display data.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A display driver comprising:
an input node for receiving display data; a level shift circuit configured to convert a voltage level of the display data and output a first voltage and a second voltage based on the display data; an output node for outputting the output display data; a first P-channel MOS (Metal-Oxide-Semiconductor) transistor coupled to the output node, the first P-channel MOS transistor including a gate that is configured to input the first voltage; and a first N-channel MOS transistor coupled to the output node, the first N-channel MOS transistor including a gate that is configured to input the second voltage, wherein a voltage difference between the second voltage and the first voltage varies based on the display data.
2 . The display driver according to claim 1 , wherein the level shift circuit further comprises:
a first voltage generator configured to generate the voltage difference based on the display data, and output the first voltage and the second voltage.
3 . The display driver according to claim 2 , wherein the level shift circuit further comprises:
a second N-channel MOS transistor including a gate that is configured to input the display data; a third N-channel MOS transistor including a gate that is configured to input an inverted display data which is inverted from the display data; a second P-channel MOS transistor including a gate that is coupled to a drain of the third N-channel MOS transistor; and a third P-channel MOS transistor including a gate that is coupled to a drain of the second N-channel MOS transistor.
4 . The display driver according to claim 3 , wherein the first voltage generator comprises:
a fourth P-channel MOS transistor coupled between the third P-channel MOS transistor and the third N-channel MOS transistor, the fourth P-channel MOS transistor including a back gate that is coupled to a source of the third P-channel MOS transistor.
5 . The display driver according to claim 4 , wherein the voltage difference varies based on a threshold voltage of the fourth P-channel MOS transistor.
6 . The display driver according to claim 5 , wherein the threshold voltage of the fourth N-channel MOS transistor decreases according to the second N-channel MOS transistor being turned on.
7 . The display driver according to claim 6 , wherein the first P-channel MOS transistor and the first N-channel MOS transistor are not turned on in a same period.
8 . The display driver according to claim 3 , wherein the first voltage generator comprises:
a fourth N-channel MOS transistor coupled between the third P-channel MOS transistor and the third N-channel MOS transistor, the fourth N-channel MOS transistor including a back gate that is coupled to a source of the third N-channel MOS transistor.
9 . The display driver according to claim 8 , wherein the voltage difference varies based on a threshold voltage of the fourth N-channel MOS transistor.
10 . The display driver according to claim 9 , wherein the threshold voltage of the fourth N-channel MOS transistor decreases according to the second N-channel MOS transistor being turned on.
11 . The display driver according to claim 10 , wherein the first P-channel MOS transistor and the first N-channel MOS transistor are not turned on in a same period.
12 . A driver comprising:
an input node for receiving data; a level shift circuit configured to convert a voltage level of the data and output a first voltage and a second voltage based on the data; an output node for outputting the output data; a first transistor of a first type coupled to the output node, the first transistor of the first type including a control terminal that is configured to input the first voltage; and a first transistor of the second type coupled to the output node, the first transistor of the second type including a control terminal that is configured to input the second voltage, wherein a voltage difference between the second voltage and the first voltage varies based on the data.
13 . The driver according to claim 12 , wherein the level shift circuit further comprises:
a first voltage generator configured to generate the voltage difference based on the data, and output the first voltage and the second voltage.
14 . The driver according to claim 13 , wherein the level shift circuit further comprises:
a second transistor of the second type including a control terminal that is configured to input the data; a third transistor of the second type including a control terminal that is configured to input an inverted data which is inverted from the data; a second transistor of the first type including a control terminal that is coupled to a first terminal of the third transistor of the second type, the first terminal being through which carriers leave a channel and is controlled by the control terminal of the third transistor of the second type; and a third transistor of the first type including a control terminal that is coupled to a first terminal of the second transistor of the second type, the first terminal being through which carriers leave a channel and is controlled by the control terminal of the third transistor of the first type.
15 . The driver according to claim 14 , wherein the first voltage generator comprises:
a fourth transistor of the first type coupled between the third transistor of the first type and the third transistor of the second type, the fourth transistor of the first type including a first and second control terminal, the second control terminal being coupled to a second terminal of the third transistor of the first type, the second terminal being through which carriers enter a channel.
16 . The driver according to claim 15 , wherein the voltage difference varies based on a threshold voltage of the fourth transistor of the first type.
17 . The driver according to claim 16 , wherein the threshold voltage of the fourth transistor of the second type decreases according to the second transistor of the second type being turned on.
18 . The driver according to claim 17 , wherein the first transistor of the first type and the first transistor of the second type are not turned on in a same period.
19 . A display driver comprising:
a level shift circuit configured to convert a voltage level of display data and output a first voltage and a second voltage based on the display data; an output terminal for outputting the output display data; a first MOS (Metal-Oxide-Semiconductor) transistor of a first type coupled to the output terminal, the first MOS transistor of the first type including a control terminal that is configured to input the first voltage; and a first MOS transistor of a second type coupled to the output terminal, the first transistor of the second type including a control terminal that is configured to input the second voltage, wherein a voltage difference between the second voltage and the first voltage varies based on the display data.
20 . The display driver according to claim 19 , wherein the level shift circuit further comprises:
a first voltage generator configured to generate the voltage difference based on the display data, and output the first voltage and the second voltage.Join the waitlist — get patent alerts
Track US2016049132A1 — get alerts on status changes and closely related new filings.
We store only your email — no account needed. See our privacy policy.